MX25L1605D
MX25L3205D
MX25L6405D
16M-BIT [x 1 / x 2] CMOS SERIAL FLASH
32M-BIT [x 1 / x 2] CMOS SERIAL FLASH
64M-BIT [x 1 / x 2] CMOS SERIAL FLASH
FEATURES
GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 16M:16,777,216 x 1 bit structure or 8,388,608 x 2 bits (two I/O read mode) structure
32M:33,554,432 x 1 bit structure or 16,772,216 x 2 bits (two I/O read mode) structure
64M:67,108,864 x 1 bit structure or 33,554,432 x 2 bits (two I/O read mode) structure
• 512 Equal Sectors with 4K byte each (16Mb)
1024 Equal Sectors with 4K byte each (32Mb)
2048 Equal Sectors with 4K byte each (64Mb)
- Any Sector can be erased individually
• 32 Equal Blocks with 64K byte each (16Mb)
64 Equal Blocks with 64K byte each (32Mb)
128 Equal Blocks with 64K byte each (64Mb)
- Any Block can be erased individually
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
PERFORMANCE
• High Performance
- Fast access time: 86MHz serial clock (15pF + 1TTL Load) and 66MHz serial clock (30pF + 1TTL Load)
- Serial clock of two I/O read mode : 50MHz (15pF + TTL Load), which is equivalent to 100MHz
- Fast program time: 1.4ms(typ.) and 5ms(max.)/page (256-byte per page)
- Byte program time: 9us (typical)
- Continuously program mode (automatically increase address under word program mode)
- Fast erase time: 60ms(typ.) /sector (4K-byte per sector) ; 0.7s(typ.) /block (64K-byte per block); 14s(typ.) /chip
for 16Mb, 25s(typ.) for 32Mb, and 50s(typ.) for 64Mb
• Low Power Consumption
- Low active read current: 25mA(max.) at 86MHz, 20mA(max.) at 66MHz and 10mA(max.) at 33MHz
- Low active programming current: 20mA (max.)
- Low active erase current: 20mA (max.)
- Low standby current: 20uA (max.)
- Deep power-down mode 1uA (typical)
• Typical 100,000 erase/program cycles
• 20 years of data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions
- Additional 512-bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector
- Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths (Any page to be programed should have page in the erased state first)
P/N: PM1290
1
REV. 1.5, APR. 29, 2009
