MC10125
Quad MECL to TTL
Translator
The MC10125 is a quad translator for interfacing data and control
signals between the MECL section and saturated logic sections of
digital systems. The MC10125 incorporates differential inputs and
Schottky TTL “totem pole” outputs. Differential inputs allow for use
as an inverting/ non–inverting translator or as a differential line
receiver. The VBB reference voltage is available on pin 1 for use in
single–ended input biasing. The outputs of the MC10125 go to a low
logic level whenever the inputs are left floating.
Power supply requirements are ground, +5.0 Volts and –5.2 Volts.
Propagation delay of the MC10125 is typically 4.5 ns. The MC10125
has fanout of 10 TTL loads. The dc levels are MECL 10,000 in and
Schottky TTL, or TTL out. This device has an input common mode
noise rejection of ± 1.0 Volt.
An advantage of this device is that MECL level information can be
received, via balanced twisted pair lines, in the TTL equipment. This
isolates the MECL logic from the noisy TTL environment. This device
is useful in computers, instrumentation, peripheral controllers, test
equipment and digital communications systems.
• PD = 380 mW typ/pkg (No Load)
• tpd = 4.5 ns typ (50% to + 1.5 Vdc out)
• tr, tf = 2.5 ns typ (1.0 V to 2.0 V)
http://onsemi.com
MARKING
DIAGRAMS
16
CDIP–16
L SUFFIX
CASE 620
MC10125L
AWLYYWW
1
16
PDIP–16
P SUFFIX
CASE 648
MC10125P
AWLYYWW
1
1
PLCC–20
FN SUFFIX
CASE 775
10125
AWLYYWW
LOGIC DIAGRAM
2
3
4
6
7
5
10
11
12
14
15
13
Gnd
=
VCC (+5.0Vdc) =
VEE (-5.2Vdc) =
A
WL
YY
WW
PIN 16
PIN 9
PIN 8
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
1
Device
* VBB to be used to supply bias to the MC10125 only and bypassed (when used)
with 0.01 µF to 0.1 µF capacitor to ground (0 V). VBB can source < 1.0 mA.
When the input pin with the bubble goes positive, the output goes negative.
Package
Shipping
MC10125L
CDIP–16
25 Units / Rail
MC10125P
PDIP–16
25 Units / Rail
MC10125FN
VBB*
PLCC–20
46 Units / Rail
DIP PIN ASSIGNMENT
VBB
1
16
GND
AIN
2
15
DIN
AIN
3
14
DIN
AOUT
4
13
DOUT
BOUT
5
12
COUT
BIN
6
11
CIN
BIN
7
10
CIN
VEE
8
9
VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
© Semiconductor Components Industries, LLC, 2002
January, 2002 – Rev. 7
1
Publication Order Number:
MC10125/D