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74ABT16245A
54ABT 74ABT16245 16-Bit Transceiver with TRI-STATE Outputs Y General Description The ’ABT16245 contains sixteen non-inverting bidirectional buffers with TRI-STATE outputs and is intended for bus oriented applications The device is byte controlled Each byte has separate control inputs which can be shorted together for full 16-bit operation The T R inputs determine the direction of data flow through the device The OE inputs disable both the A and B ports by placing them in a high impedance state Y Y Y Y Y Y Y Features Y Y Bidirectional non-inverting buffers Separate control logic for each byte 16-bit version of the ’ABT245 Y Y A and B output sink capability of 64 mA source capability of 32 mA Guaranteed output skew Guaranteed multiple output switching specifications Output switching specified for both 50 pF and 250 pF loads Guaranteed simultaneous switching noise level and dynamic threshold performance Guaranteed latchup protection High impedance glitch free bus loading during entire power up and power down cycle Non-destructive hot insertion capability Standard Military Drawing (SMD) 5962-9317501 Package Package Description Number 74ABT16245CSSC (Note 1) MS48A 48-Lead (0 300 Wide) Molded Shrink Small Outline JEDEC (SSOP) 74ABT16245CMTD (Notes 1 2) MTD48 48-Lead Molded Thin Shrink Small Outline JEDEC (TSSOP) 54ABT16245W 883 WA48A 48-Lead Cerpack Commercial Military Note 1 Devices also available in 13 reel Use suffix e SSCX and MTDX Note 2 Contact factory for package availability Logic Symbol Connection Diagram Pin Assignment for SSOP TL F 10986 – 1 Pin Description Pin Names OEn T Rn A0 –A15 B0 –B15 Description Output Enable Input (Active Low) Transmit Receive Input Side A Inputs Outputs Side B Inputs Outputs TL F 10986 – 2 TRI-STATE is a registered trademark of National Semiconductor Corporation C1996 National Semiconductor Corporation TL F 10986 RRD-B30M96 Printed in U S A http www national com 54ABT 74ABT16245 16-Bit Transceiver with TRI-STATE Outputs August 1996 Absolute Maximum Ratings (Note 1) DC Latchup Source Current Over Voltage Latchup (I O) If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic Plastic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-off State in the HIGH State Current Applied to Output in LOW State (Max) b 500 mA 10V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired Functional operation under these conditions is not implied Note 2 Either voltage limit or current limit is sufficient to protect inputs b 65 C to a 150 C b 55 C to a 125 C Recommended Operating Conditions b 55 C to a 175 C b 55 C to a 150 C Free Air Ambient Temperature Military Commercial Supply Voltage Military Commercial Minimum Input Edge Rate Data Input Enable Input b 0 5V to a 7 0V b 0 5V to a 7 0V b 30 mA to a 5 0 mA b 0 5V to 5 5V b 0 5V to VCC twice the rated IOL (mA) b 55 C to a 125 C b 40 C to a 85 C a 4 5V to a 5 5V a 4 5V to a 5 5V (DV Dt) 50 mV ns 20 mV ns DC Electrical Characteristics Symbol ABT16245 Parameter VIH Input HIGH Voltage VIL Input Clamp Diode Voltage VOH Output HIGH Voltage Typ Input LOW Voltage VCD Min Max 20 Units VCC V 08 V Recognized HIGH Signal V b1 2 Conditions Min Recognized LOW Signal IIN e b18 mA (OEn T Rn) 20 V Min IOH e b32 mA (An Bn) V Min IOL e 48 mA (An Bn) IOL e 64 mA (An Bn) 5 5 mA Max VIN e 2 7V (OEn T Rn) (Note 1) VIN e VCC (OEn T Rn) 7 mA Max VIN e 7 0V (OEn T Rn) 100 mA Max VIN e 5 5V (An Bn) b5 b5 mA Max VIN e 0 5V (OEn T Rn) (Note 1) VIN e 0 0V (OEn T Rn) V 00 Input HIGH Current Breakdown Test (I O) Input LOW Current VID IOH e b3 mA (An Bn) IOH e b24 mA (An Bn) Input HIGH Current Breakdown Test IIL Min Input HIGH Current IBVIT Min V 74ABT IBVI V 20 Output LOW Voltage IIH 25 54ABT VOL 54ABT 74ABT 54ABT 74ABT Input Leakage Test 0 55 0 55 4 75 IID e 1 9 mA (OEn T Rn) All Other Pins Grounded IIH a IOZH Output Leakage Current 50 mA IIL a IOZL Output Leakage Current b 50 mA b 275 mA Max VOUT e 0 0V (An Bn) 50 mA Max VOUT e VCC (An Bn) 100 mA 00 VOUT e 5 50V (An Bn) All Others GND IOS Output Short-Circuit Current ICEX Output High Leakage Current IZZ Bus Drainage Test ICCH Power Supply Current 100 mA Max All Outputs HIGH ICCL Power Supply Current 60 mA Max All Outputs LOW ICCZ Power Supply Current 100 mA Max OEn e VCC T Rn e GND or VCC All others at VCC or GND ICCT Additional ICC Input 25 25 50 mA mA mA Max 01 mA MHz Max ICCD Dynamic ICC b 100 0 b 5 5V VOUT e 2 7V (An Bn) OE e 2 0V 0 b 5 5V VOUT e 0 5V (An Bn) OE e 2 0V Outputs Enabled Outputs TRI-STATE Outputs TRI-STATE No Load VI e VCC b 2 1V OEn T Rn VI e VCC b 2 1V Data Input VI e VCC b 2 1V All others at VCC or GND Outputs Open OEn e GND T Rn e GND or VCC One Bit Toggling 50% Duty Cycle Note 1 Guaranteed but not tested 3 http www national com
TI
Texas Instruments Incorporated
U.S.A
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