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DM7426N
DM5426 DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation RMAX e VO (Min) b VOH N1 (IOH) a N2 (IIH) VO (Max) b VOL RMIN e IOL b N3 (IIL) Where N1 (IOH) e total maximum output high current for all outputs tied to pull-up resistor N2 (IIH) e total maximum input high current for all inputs tied to pull-up resistor N3 (IIL) e total maximum input low current for all inputs tied to pull-up resistor Connection Diagram Dual-In-Line Package TL F 6508 – 1 Order Number DM5426J or DM7426N See NS Package Number J14A or N14A Function Table Y e AB Inputs Output A B Y L L H H L H L H H H H L H e High Logic Level L e Low Logic Level C1995 National Semiconductor Corporation TL F 6508 RRD-B30M105 Printed in U S A DM5426 DM7426 Quad 2-Input NAND Gates with High Voltage Open-Collector Outputs June 1989
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