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SCN2661B

製品説明
仕様・特性

Philips Semiconductors Product specification Enhanced programmable communications interface (EPCI) DESCRIPTION SCN2661/SCN68661 PIN CONFIGURATIONS The Philips Semiconductors SCN2661 EPCI is a universal synchronous/asynchronous data communications controller chip that is an enhanced version of the SCN2651. It interfaces easily to all 8-bit and 16-bit microprocessors and may be used in a polled or interrupt driven system environment. The SCN2661 accepts programmed instructions from the microprocessor while supporting many serial data communications disciplines —synchronous and asynchronous — in the full- or half-duplex mode. Special support for BISYNC is provided. D2 1 28 D1 D3 2 27 D0 RxD 4 25 RxC/BKDET 5 24 DTR 6 23 RTS D6 7 22 DSR D7 8 21 RESET TxC/XSYNC 9 20 BRCLK A1 10 19 TxD CE 11 18 TxEMT/DSCHG A0 12 17 CTS R/W 13 16 DCD RxRDY 14 FEATURES VCC D5 The SCN2661 contains a baud rate generator which can be programmed to either accept an external clock or to generate internal transmit or receive clocks. Sixteen different baud rates can be selected under program control when operating in the internal clock mode. Each version of the EPCI (A, B, C) has a different set of baud rates. 26 D4 The EPCI serializes parallel data characters received from the microprocessor for transmission. Simultaneously, it can receive serial data and convert it into parallel data characters for input to the microcomputer. 3 GND 15 TxRDY INDEX CORNER • Synchronous operation DIP 4 1 26 – 5- to 8-bit characters plus parity 5 – Single or double SYN operation 25 – Internal or external character synchronization PLCC – Transparent or non-transparent mode – Transparent mode DLE stuffing (Tx) and detection (Rx) 11 – Automatic SYN or DLE-SYN insertion SYN, DLE and DLESYN stripping 19 12 18 TOP VIEW – Odd, even, or no parity NOTE: Pin Functions the same as 28-pin DIP. – Local or remote maintenance loopback mode – Baud rate: DC to 1Mbps (1X clock) SD00077 • Asynchronous operation • Dynamic character length switching • Full- or half-duplex operation • TTL compatible inputs and outputs • RxC and TxC pins are short-circuit protected • Single +5V power supply • No system clock required – 5- to 8-bit characters plus parity – 1, 1-1/2 or 2 stop bits transmitted – Odd, even, or no parity – Parity, overrun and framing error detection – Line break detection and generation – False start bit detection – Automatic serial echo mode (echoplex) – Local or remote maintenance loopback mode – Baud rate: DC to 1Mbps (1X clock) DC to 62.5kbps (16X clock) DC to 15.625kbps (64X clock) APPLICATIONS • Intelligent terminals • Network processors • Front-end processors • Remote data concentrators • Computer-to-computer links • Serial peripherals • BISYNC adaptors OTHER FEATURES • Internal or external baud rate clock • 3 baud rate sets • 16 internal rates for each set • Double-buffered transmitter and receiver 1994 Apr 27 1 853-1070 12793

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