MCP2515
Stand-Alone CAN Controller with SPI Interface
Features
Description
• Implements CAN V2.0B at 1 Mb/s:
- 0 to 8-byte length in the data field
- Standard and extended data and remote
frames
• Receive Buffers, Masks and Filters:
- Two receive buffers with prioritized message
storage
- Six 29-bit filters
- Two 29-bit masks
• Data Byte Filtering on the First Two Data Bytes
(applies to standard data frames)
• Three Transmit Buffers with Prioritization and
Abort Features
• High-Speed SPI Interface (10 MHz):
- SPI modes 0,0 and 1,1
• One-Shot mode Ensures Message Transmission
is Attempted Only One Time
• Clock Out Pin with Programmable Prescaler:
- Can be used as a clock source for other
device(s)
• Start-of-Frame (SOF) Signal is Available for
Monitoring the SOF Signal:
- Can be used for time slot-based protocols
and/or bus diagnostics to detect early bus
degradation
• Interrupt Output Pin with Selectable Enables
• Buffer Full Output Pins Configurable as:
- Interrupt output for each receive buffer
- General purpose output
• Request-to-Send (RTS) Input Pins Individually
Configurable as:
- Control pins to request transmission for each
transmit buffer
- General purpose inputs
• Low-Power CMOS Technology:
- Operates from 2.7V-5.5V
- 5 mA active current (typical)
- 1 µA standby current (typical) (Sleep mode)
• Temperature Ranges Supported:
- Industrial (I): -40°C to +85°C
- Extended (E): -40°C to +125°C
Microchip Technology’s MCP2515 is a stand-alone
Controller Area Network (CAN) controller that implements the CAN specification, Version 2.0B. It is capable
of transmitting and receiving both standard and
extended data and remote frames. The MCP2515 has
two acceptance masks and six acceptance filters that
are used to filter out unwanted messages, thereby
reducing the host MCU’s overhead. The MCP2515
interfaces with microcontrollers (MCUs) via an industry
standard Serial Peripheral Interface (SPI).
Package Types
18-Lead PDIP/SOIC
TXCAN
1
18
VDD
2
17
RESET
3
16
CS
TX0RTS
4
15
SO
14
SI
13
SCK
12
INT
MCP2515
RXCAN
CLKOUT/SOF
TX1RTS
5
TX2RTS
6
OSC2
7
OSC1
8
11
RX0BF
VSS
9
10
RX1BF
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
VDD
RESET
CS
SO
SI
NC
SCK
INT
RX0BF
RX1BF
RESET
CS
MCP2515
VDD
20-Lead QFN*
TXCAN
TXCAN
RXCAN
CLKOUT/SOF
TX0RTS
TX1RTS
NC
TX2RTS
OSC2
OSC1
VSS
RXCAN
20-Lead TSSOP
20 19 18 17 16
CLKOUT 1
15 SO
TX0RTS 2
14 SI
EP
21
TX1RTS 3
13 NC
12 SCK
NC 4
11 INT
7
8
9 10
OSC1
GND
RX1BF
RX0BF
6
OSC2
TX2RTS 5
* Includes Exposed Thermal Pad (EP); see Table 1-1.
2003-2016 Microchip Technology Inc.
DS20001801H-page 1
