C8051F55x/56x/57x
Mixed Signal ISP Flash MCU Family
Analog Peripherals
- 12-Bit ADC
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Memory
- 2304 bytes internal data RAM (256 + 2048 XRAM)
- 32 or 16 kB Flash; In-system programmable in
Up to 200 ksps
Up to 32 external single-ended inputs
VREF from on-chip VREF, external pin or VDD
Internal or external start of conversion source
Built-in temperature sensor
512-byte Sectors
Digital Peripherals
- 33, 25, or 18 Port I/O; All 5 V tolerant
- CAN 2.0 Controller—no crystal required
- LIN 2.1 Controller (Master and Slave capable); no
Two Comparators
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Programmable hysteresis and response time
Configurable as interrupt or reset source
Low current
On-Chip Debug
- On-chip debug circuitry facilitates full speed, non-
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intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost, complete development kit
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Supply Voltage 1.8 to 5.25 V
- Typical operating current: 19 mA at 50 MHz
- Typical stop mode current: 1 µA
High-Speed 8051 µC Core
- Pipelined instruction architecture; executes 70% of
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ANALOG
PERIPHERALS
12-bit
200 ksps
ADC
Clock Sources
- Internal 24 MHz with ±0.5% accuracy for CAN and
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master LIN operation
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly;
useful in power saving modes
Packages
- 40-pin QFN (C8051F568-9 and ‘F570-5)
- 32-pin QFP/QFN (C8051F560-7)
- 24-pin QFN (C8051F550-7)
Automotive Qualified
- Temperature Range: –40 to +125 °C
- Compliant to AEC-Q100
instructions in 1 or 2 system clocks
Up to 50 MIPS throughput with 50 MHz clock
Expanded interrupt handler
A
M
U
X
crystal required
Hardware enhanced UART, SMBus™, and
enhanced SPI™ serial ports
Four general purpose 16-bit counter/timers
16-bit programmable counter array (PCA) with six
capture/compare modules and enhanced PWM
functionality
TEMP
SENSOR
VREG
Voltage
Comparators 0-1 VREF
24 MHz PRECISION
INTERNAL OSCILLATOR
DIGITAL I/O
UART 0
SMBus
SPI
PCA
Timers 0-3
CAN
LIN
Ports 0-4
Crossbar
External
Memory
Interface
2x Clock Multiplier
HIGH-SPEED CONTROLLER CORE
32 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
Rev. 1.2 9/14
8051 CPU
(50 MIPS)
DEBUG
CIRCUITRY
2 kB XRAM
POR
Copyright © 2014 by Silicon Laboratories
WDT
C8051F55x, C8051F56x, C8051F57x
