CAT28F010
Licensed Intel
1 Megabit CMOS Flash Memory second source
FEATURES
s Commercial, industrial and automotive
s Fast read access time: 90/120 ns
temperature ranges
s Low power CMOS dissipation:
s On-chip address and data latches
–Active: 30 mA max (CMOS/TTL levels)
–Standby: 1 mA max (TTL levels)
–Standby: 100 µA max (CMOS levels)
s JEDEC standard pinouts:
–32-pin DIP
–32-pin PLCC
–32-pin TSOP (8 x 20)
s High speed programming:
–10 µs per byte
–2 Sec Typ Chip Program
s 100,000 program/erase cycles
s 0.5 seconds typical chip-erase
s 12.0V
s 10 year data retention
± 5% programming and erase voltage
s Electronic signature
s Stop timer for program/erase
DESCRIPTION
using a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F010 is a high speed 128K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
The CAT28F010 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
It is pin and Read timing compatible with standard
EPROM and EEPROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
I/O0–I/O7
BLOCK DIAGRAM
I/O BUFFERS
ERASE VOLTAGE
SWITCH
WE
COMMAND
REGISTER
PROGRAM VOLTAGE
SWITCH
CE, OE LOGIC
DATA
LATCH
SENSE
AMP
CE
ADDRESS LATCH
OE
A0–A16
Y-GATING
Y-DECODER
X-DECODER
1,048,576 BIT
MEMORY
ARRAY
VOLTAGE VERIFY
SWITCH
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-1019, Rev. G
