HD74HC589
8-bit Serial or Parallel-input/Serial-output Shift Register
(with 3-state outputs)
ADE-205-511 (Z)
1st. Edition
Sep. 2000
Description
The HD74HC589 is similar in function to the HD74HC597, which is not a 3-state device.
This device consists of an 8-bit storage latch which feeds parallel data to an 8-bit shift register. Data can
also be loaded serially (see Function Table). The shift register output, OH, is a three-state output, allowing
this device to be used in bus-oriented systems.
Features
•
•
•
•
•
High Speed Operation: tpd (Shift Clock to Q H) = 15 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Latch Clock
LCK
Shift Clock
SCK
Serial Shift/
Parallel Load
Output Enable
OE
Function
X
X
X
Data are loaded into input latches
X
L
L
Data are loaded from input into shift
registers
X
X
L
L
Data are transfered from input
latches to shift registers
L, H,
L, H,
X
H
Outputs are disabled
H
L
Serial shift Qn = Qn – 1, Q0 = SER
X