a
CMOS
DDS Modulator
AD7008
phase modulation, frequency modulation, and both in-phase and
quadrature amplitude modulation suitable for QAM and SSB
generation.
FEATURES
Single +5 V Supply
32-Bit Phase Accumulator
On-Chip COSINE and SINE Look-Up Tables
On-Chip 10-Bit DAC
Frequency, Phase and Amplitude Modulation
Parallel and Serial Loading
Software and Hardware Power Down Options
20 MHz and 50 MHz Speed Grades
44-Pin PLCC
Clock rates up to 20 MHz and 50 MHz are supported. Frequency accuracy can be controlled to one part in 4 billion.
Modulation may be effected by loading registers either through
the parallel microprocessor interface or the serial interface. A
frequency-select pin permits selection between two frequencies
on a per cycle basis.
OBS
The serial and parallel interfaces may be operated independently
and asynchronously from the DDS clock; the transfer control
signals are internally synchronized to prevent metastability problems. The synchronizer can be bypassed to reduce the transfer
latency in the event that the microprocessor clock is synchronous with the DDS clock.
APPLICATIONS
Frequency Synthesizers
Frequency, Phase or Amplitude Modulators
DDS Tuning
Digital Modulation
OLE
PRODUCT DESCRIPTION
A power-down pin allows external control of a power-down
mode (also accessible through the microprocessor interface)
The AD7008 is available in 44-pin PLCC.
The AD7008 direct digital synthesis chip is a numerically controlled oscillator employing a 32-bit phase accumulator, sine and
cosine look-up tables and a 10-bit D/A converter integrated on a
single CMOS chip. Modulation capabilities are provided for
PRODUCT HIGHLIGHT
1. Low Power
2. DSP/µP Interface
3. Completely Integrated
FUNCTIONAL BLOCK DIAGRAM
VAA
GND
TE
FS ADJUST
CLOCK
VREF
IQMOD [19:10]
FULLSCALE
ADJUST
10
FSELECT
32
32
FREQ0
REG
10
SIN
32
12
Σ
MUX
Σ
12
SIN/COS
ROM
32
FREQ1
REG
COMP
10
PHASE
ACCUMULATOR
Σ
10
10
IOUT
10-BIT DAC
IOUT
10
COS
12
10
PHASE REG
SCLK
IQMOD [9:0]
32-BIT SERIAL REGISTER
SDATA
AD7008
COMMAND REG
32-BIT PARALLEL REGISTER
TRANSFER LOGIC
MPU INTERFACE
D0
D15
WR
CS
TC0
TC3
LOAD
TEST
RESET
SLEEP
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood. MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
