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XC95108-20TQ100C

製品説明
仕様・特性

– PRODUCT OBSOLETE / UNDER OBSOLESCENCE – 0 XC95108 In-System Programmable CPLD R DS066 (v5.0) May 17, 2013 0 5 Product Specification Features Description • • 7.5 ns pin-to-pin logic delays on all pins fCNT to 125 MHz • • • 108 macrocells with 2,400 usable gates Up to 108 user I/O pins 5V in-system programmable - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range Enhanced pin-locking architecture Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals Extensive IEEE Std 1149.1 boundary-scan (JTAG) support Programmable power reduction mode in each macrocell Slew rate control on individual outputs User programmable ground pin capability Extended pattern security features for design protection High-drive 24 mA outputs 3.3V or 5V I/O capability Advanced CMOS 5V FastFLASH™ technology Supports parallel programming of more than one XC9500 concurrently Available in 84-pin PLCC, 100-pin PQFP, 100-pin TQFP, and 160-pin PQFP packages The XC95108 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of eight 36V18 Function Blocks, providing 2,400 usable gates with propagation delays of 7.5 ns. See Figure 2 for the architecture overview. • • • • • • • • • • Power dissipation can be reduced in the XC95108 by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation. Operating current for each design can be approximated for specific operating conditions using the following equation: ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f Where: MCHP = Macrocells in high-performance mode MCLP = Macrocells in low-power mode MC = Total number of macrocells used f = Clock frequency (MHz) Figure 1 shows a typical calculation for the XC95108 device. 300 e manc Typical ICC (mA) • • Power Management erfor High P 200 (180) (250) (170) wer ow Po L 100 0 50 100 Clock Frequency (MHz) DS066_01_110501 Figure 1: Typical ICC vs. Frequency for XC95108 © 1998, 2003–2006, 2013 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm. All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice. DS066 (v5.0) May 17, 2013 Product Specification www.xilinx.com 1

ブランド

XILINX

会社名

Xilinx, Inc

本社国名

U.S.A

事業概要

プログラマブルロジックデバイスの開発および販売

供給状況

 
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