DATA SHEET
MOS FIELD EFFECT POWER TRANSISTORS
2SJ495
SWITCHING P-CHANNEL POWER MOS FET INDUSTRIAL USE
DESCRIPTION
PACKAGE DIMENSIONS
This product is P-Channel MOS Field Effect Transistor
(in millimeter)
designed for high current switching applications.
10.0 ± 0.3
3.2 ± 0.2
4.5 ± 0.2
2.7 ± 0.2
FEATURES
4 ± 0.2
• Built-in Gate Protection Diode
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage
VDSS
–60
V
Gate to Source Voltage*
VGSS(AC)
m20
V
Gate to Source Voltage
VGSS(DC)
–20, 0
V
0.7 ± 0.1
2.54
12.0 ± 0.2
RDS(on)2 = 56 mΩ MAX. (VGS = –4 V, ID = –15 A)
• Low Ciss Ciss = 4120 pF TYP.
13.5 MIN.
RDS(on)1 = 30 mΩ MAX. (VGS = –10 V, ID = –15 A)
3 ± 0.1
15.0 ± 0.3
• Super Low On-State Resistance
ID(DC)
m30
A
ID(pulse)
m120
A
Total Power Dissipation (TC = 25°C)
PT
35
W
Total Power Dissipation (TA = 25°C)
PT
2.0
W
Channel Temperature
Tch
150
°C
Storage Temperature
Tstg
–55 to +150
1.3 ± 0.2
1.5 ± 0.2
2.54
2.5 ± 0.1
0.65 ± 0.1
°C
Drain Current (DC)
Drain Current (pulse)**
1. Gate
2. Drain
3. Source
1 2 3
*f = 20 kHz, Duty Cycle ≤ 10% (+Side)
**PW ≤ 10 µs, Duty Cycle ≤ 1%
THERMAL RESISTANCE
MP-45F (ISOLATED TO-220)
Channel to Case
Rth(ch-c)
3.57
°C/W
Channel to Ambient
Rth(ch-A)
62.5
°C/W
Drain
Body
Diode
Gate
Gate Protection
Diode
Source
The diode connected between the gate and source of the transistor serves as a protector against ESD. When this deveice
acutally used, an addtional protection circiut is externally required if a voltage exceeding the rated voltage may be applied
to this device.
Document No. D11267EJ2V0DS00 (2nd edition)
Date Published November 1997 N
Printed in Japan
©
1997
