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UPD70F3736GK-GAK-AX

製品説明
仕様・特性

PRELIMINARY PRODUCT INFORMATION MOS INTEGRATED CIRCUIT μPD70F3735, 70F3736, 70F3737, 70F3738 V850ES/JF3-L, V850ES/JG3-L 32-BIT SINGLE-CHIP MICROCONTROLLERS DESCRIPTION The μPD70F3735, 70F3736 (V850ES/JF3-L), and μPD70F3737, 70F3738 (V850ES/JG3-L) are products of the V850 32-bit single-chip microcontrollers, and include peripheral functions such as ROM/RAM, timer/counters, serial interfaces, an A/D converter, a D/A converter, and a DMA controller. In addition to their high real-time responsiveness and one-clock-pitch execution of instructions, the V850ES/JF3-L, and V850ES/JG3-L include instructions suited to digital servo control applications such as multiplication instructions executed via a hardware multiplier, saturation instructions, and bit manipulation instructions. As a real-time control system, this device enables an extremely high cost-performance for applications that require low power consumption, such as digital camera, electrical power-meter, and mobile phone. Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before designing. V850ES/JF3-L, V850ES/JG3-L Hardware User’s Manual: To be prepared V850ES Architecture User’s Manual: U15943E FEATURES Number of instructions: 83 Minimum instruction execution time: 50 ns (@ 20 MHz operation with main clock (fXX)) Clock • Main clock oscillation: fX = 2.5 to 10 MHz • Subclock oscillation: fXT = 32.768 kHz • Internal oscillation: fR = 220 kHz (TYP.) General-purpose registers: 32 bits × 32 registers Instruction set: Signed multiplication, saturation operations, 32-bit shift instructions, bit manipulation instructions, load/store instructions Memory space: 64 MB linear address space External bus interface: Address bus: Separate output enable (V850ES/JG3-L only) Multiplexed bus mode Internal memory Flash memory: 128 KB, 256 KB RAM: 8 KB, 16 KB I/O lines Total: 66/84 Interrupts and exceptions Non-maskable interrupts: 2 sources Maskable interrupts: 47/55 sources Timer/counters 16-bit timer/counter P (TMP): 4, 6 channels 16-bit timer/counter Q (TMQ): 1 channel 16-bit interval timer M (TMM): 1 channel Watch timer: 1 channel Watchdog timer: 1 channel Real-time output function: 6 channel A/D converter: 10-bit resolution × 8, 12 channels D/A converter: 8-bit resolution × 1, 2 channels Serial interface • Asynchronous serial interface (UARTA): 3 channels • Clocked serial interface (CSIB): 3, 5 channels 2 2, 3 channels • I C bus interface: DMA controller: 4 channels Power save function: HALT/IDLE1/IDLE2/STOP/subclock/sub-IDLE mode On-chip debug function Package: 80-/100-pin LQFP Operating supply voltage: 2.2 to 3.6 V@5 MHz 2.7 to 3.6 V@20 MHz Operating supply current: 14 mA@20 MHz (TYP.) The information contained in this document is being issued in advance of the production cycle for the product. The parameters for the product may change before final production or NEC Electronics Corporation, at its own discretion, may withdraw the product prior to its production. Not all products and/or types are available in every country. Please check with an NEC Electronics sales representative for availability and additional information. Document No. U18796EJ1V0PM00 (1st edition) Date Published October 2007 N Printed in Japan 2007

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