EtronTech
EM6A9160TSA
8M x 16 DDR Synchronous DRAM (SDRAM)
Etron Confidential
Advanced (Rev. 1.1 Aug. /2009)
Features
Table 1.Ordering Information
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•
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•
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Clock
Data Rate Package
Frequency
EM6A9160TSA-4G 250MHz 500Mbps/pin TSOPII
Fast clock rate: 250MHz
Differential Clock CK & CK input
Bi-directional DQS
DLL enable/disable by EMRS
Fully synchronous operation
Internal pipeline architecture
Four internal banks, 2M x 16-bit for each bank
Programmable Mode and Extended Mode registers
- CAS Latency: 3
- Burst length: 2, 4, 8
- Burst Type: Sequential & Interleaved
• Individual byte write mask control
• DM Write Latency = 0
• Auto Refresh and Self Refresh
• 4096 refresh cycles / 64ms
• Precharge & active power down
• Power supplies: VDD & VDDQ = 2.5V ± 5%
• Interface: SSTL_2 I/O Interface
• Package: 66 Pin TSOP II, 0.65mm pin pitch
- Pb and Halogen Free
Overview
The EM6A9160 SDRAM is a high-speed CMOS
double data rate synchronous DRAM containing 128
Mbits. It is internally configured as a quad 2M x 16
DRAM with a synchronous interface (all signals are
registered on the positive edge of the clock signal, CK).
Data outputs occur at both rising edges of CK
and CK .Read and write accesses to the SDRAM are
burst oriented; accesses start at a selected location
and continue for a programmed number of locations in
a programmed sequence. Accesses begin with the
registration of a BankActivate command which is then
followed by a Read or Write command. The EM6A9160
provides programmable Read or Write burst lengths of
2, 4, or 8. An auto precharge function may be enabled
to provide a self-timed row precharge that is initiated at
the end of the burst sequence. The refresh functions,
either Auto or Self Refresh are easy to use. In addition,
EM6A9160 features programmable DLL option. By
having a programmable mode register and extended
mode register, the system can choose the most
suitable modes to maximize its performance. These
devices are well suited for applications requiring high
memory bandwidth and high performance.
Part Number
TS: indicates TSOP II package
A: indicates Generation Code
G: indicates Pb and Halogen Free for TSOPII Package
Figure 1. Pin Assignment (Top View)
VDD
DQ0
VDDQ
DQ1
DQ2
VSSQ
DQ3
DQ4
VDDQ
DQ5
DQ6
VSSQ
DQ7
NC
VDDQ
LDQS
NC
VDD
NC
LDM
WE
CAS
RAS
CS
NC
BA0
BA1
A10/AP
A0
A1
A2
A3
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
VSS
DQ15
VSSQ
DQ14
DQ13
VDDQ
DQ12
DQ11
VSSQ
DQ10
DQ9
VDDQ
DQ8
NC
VSSQ
UDQS
NC
VREF
VSS
UDM
CK
CK
CKE
NC
NC
A11
A9
A8
A7
A6
A5
A4
VSS
Etron Technology, Inc.
No. 6, Technology Rd. V, Hsinchu Science Park, Hsinchu, Taiwan 30078, R.O.C.
TEL: (886)-3-5782345
FAX: (886)-3-5778671
Etron Technology, Inc. reserves the right to change products or specification without notice.