Features
• Utilizes the AVR® RISC Architecture
• High-performance and Low-power 8-bit RISC Architecture
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•
•
•
•
•
– 90 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Up to 8 MIPS Throughput at 8 MHz
Nonvolatile Program and Data Memory
– 1K Byte of Flash Program Memory
In-System Programmable (ATtiny12)
Endurance: 1,000 Write/Erase Cycles (ATtiny11/12)
– 64 Bytes of In-System Programmable EEPROM Data Memory for ATtiny12
Endurance: 100,000 Write/Erase Cycles
– Programming Lock for Flash Program and EEPROM Data Security
Peripheral Features
– Interrupt and Wake-up on Pin Change
– One 8-bit Timer/Counter with Separate Prescaler
– On-chip Analog Comparator
– Programmable Watchdog Timer with On-chip Oscillator
Special Microcontroller Features
– Low-power Idle and Power-down Modes
– External and Internal Interrupt Sources
– In-System Programmable via SPI Port (ATtiny12)
– Enhanced Power-on Reset Circuit (ATtiny12)
– Internal Calibrated RC Oscillator (ATtiny12)
Specification
– Low-power, High-speed CMOS Process Technology
– Fully Static Operation
Power Consumption at 4 MHz, 3V, 25°C
– Active: 2.2 mA
– Idle Mode: 0.5 mA
– Power-down Mode: <1 µA
Packages
– 8-pin PDIP and SOIC
Operating Voltages
– 1.8 - 5.5V for ATtiny12V-1
– 2.7 - 5.5V for ATtiny11L-2 and ATtiny12L-4
– 4.0 - 5.5V for ATtiny11-6 and ATtiny12-8
Speed Grades
– 0 - 1.2 MHz (ATtiny12V-1)
– 0 - 2 MHz (ATtiny11L-2)
– 0 - 4 MHz (ATtiny12L-4)
– 0 - 6 MHz (ATtiny11-6)
– 0 - 8 MHz (ATtiny12-8)
8-bit
Microcontroller
with 1K Byte
Flash
ATtiny11
ATtiny12
Pin Configuration
ATtiny11
PDIP/SOIC
(RESET) PB5
(XTAL1) PB3
(XTAL2) PB4
GND
1
2
3
4
8
7
6
5
ATtiny12
PDIP/SOIC
VCC
PB2 (T0)
PB1 (INT0/AIN1)
PB0 (AIN0)
(RESET) PB5
(XTAL1) PB3
(XTAL2) PB4
GND
1
2
3
4
8
7
6
5
VCC
PB2 (SCK/T0)
PB1 (MISO/INT0/AIN1)
PB0 (MOSI/AIN0)
Not recommended for new
design
Rev. 1006F–AVR–06/07
1
ATtiny11/12
ATtiny11 Block Diagram
See Figure 1 on page 3. The ATtiny11 provides the following features: 1K bytes of
Flash, up to five general-purpose I/O lines, one input line, 32 general-purpose working
registers, an 8-bit timer/counter, internal and external interrupts, programmable Watchdog Timer with internal oscillator, and two software-selectable power-saving modes.
The Idle Mode stops the CPU while allowing the timer/counters and interrupt system to
continue functioning. The Power-down Mode saves the register contents but freezes the
oscillator, disabling all other chip functions until the next interrupt or hardware reset. The
wake-up or interrupt on pin change features enable the ATtiny11 to be highly responsive
to external events, still featuring the lowest power consumption while in the power-down
modes.
The device is manufactured using Atmel’s high-density nonvolatile memory technology.
By combining an RISC 8-bit CPU with Flash on a monolithic chip, the Atmel ATtiny11 is
a powerful microcontroller that provides a highly-flexible and cost-effective solution to
many embedded control applications.
Figure 1. The ATtiny11 Block Diagram
VCC
8-BIT DATA BUS
INTERNAL
OSCILLATOR
GND
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
PROGRAM
FLASH
HARDWARE
STACK
MCU CONTROL
REGISTER
INSTRUCTION
REGISTER
GENERALPURPOSE
REGISTERS
INSTRUCTION
DECODER
MCU STATUS
REGISTER
Z
TIMER/
COUNTER
ALU
CONTROL
LINES
TIMING AND
CONTROL
INTERRUPT
UNIT
STATUS
REGISTER
ANALOG
COMPARATOR
+
-
PROGRAMMING
LOGIC
OSCILLATORS
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
PORTB DRIVERS
PB0-PB5
3
1006F–AVR–06/07
