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M48T59Y-70PC1

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仕様・特性

M48T59 M48T59Y, M48T59V 5.0 or 3.3 V, 64 Kbit (8 Kbit x 8) TIMEKEEPER® SRAM Not For New Design Features ■ Integrated ultra low power SRAM, real-time clock, power-fail control circuit, and battery ■ Frequency test output for real-time clock software calibration ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages (VPFD = Power-fail deselect voltage): – M48T59: VCC = 4.75 to 5.5 V 4.5 V ≤ VPFD ≤ 4.75 V – M48T59Y: VCC = 4.5 to 5.5 V 4.2 V ≤ VPFD ≤ 4.5 V – M48T59V(a): VCC = 3.0 to 3.6 V 2.7 V ≤ VPFD ≤ 3.0 V 28 1 s) t( uc od r PCDIP28 (PC) battery/crystal CAPHAT ■ ■ Packaging includes a 28-lead SOIC and SNAPHAT® top (to be ordered separately) ■ ol bs Self-contained battery and crystal in the CAPHAT™ DIP package eP et SOIC package provides direct connection for a SNAPHAT top which contains the battery and crystal SNAPHAT (SH) battery/crystal -O ) t(s uc d ■ Microprocessor power-on reset (valid even during battery back-up mode) ■ Programmable alarm output active in the battery back-up mode ■ Battery low flag ■ RoHS compliant – Lead-free second level interconnect ro eP 28 1 et ol SOH28 (MH) bs O a. Contact local ST sales office for availability of 3.3 V version. April 2008 Rev 7 This is information on a product still in production but not recommended for new designs. 1/32 www.st.com 1

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