Analog/HDMI
Dual Display Interface
AD9880
FEATURES
FUNCTIONAL BLOCK DIAGRAM
ANALOG INTERFACE
R/G/B OR YPbPrIN1
2:1
MUX
HSYNC 0
HSYNC 1
HSYNC 0
HSYNC 1
2:1
MUX
or YCbCr
2:1
MUX
SOGIN 0
SOGIN 1
R/G/B 8X3
A/D
CLAMP
COAST
FILT
CKINV
CKEXT
2:1
MUX
SYNC
PROCESSING
AND
CLOCK
GENERATION
2 DATACK
HSOUT
VSOUT
SOGOUT
REFOUT
REFIN
REF
SCL
SERIAL REGISTER
AND
POWER MANAGEMENT
R/G/B 8X3
YCbCr (4:2:2
OR 4:4:4)
2
RGB
SDA
YCbCr MATRIX
R/G/B OR YPbPrIN0
MUXES
DATACK
HSOUT
VSOUT
SOGOUT
DIGITAL INTERFACE
DE
R/G/B 8X3
OR YCbCr
RX0+
RX0–
2
RX1+
RX1–
RX2+
DE
HSYNC
VSYNC
HDMI RECEIVER
RX2–
RXC+
RXC–
RTERM
MCL
MDA
DDCSCL
DDCSDA
DATACK
SPDIF OUT
4
8-CHANNEL
I2S OUT
SCLK
MCLK
LRCLK
HDCP
AD9880
05087-001
Analog/HDMI dual interface
Supports high bandwidth digital content protection
RGB-to-YCbCr 2-way color conversion
Automated clamping level adjustment
1.8 V/3.3 V power supply
100-lead LQFP Pb-free package
RGB and YCbCr output formats
Analog interface
8-bit triple ADC
100 MSPS maximum conversion rate
Macrovision® detection
2:1 input mux
Full sync processing
Sync detect for hot plugging
Midscale clamping
Digital video interface
HDMI v 1.1, DVI v 1.0
150 MHz HDMI receiver
Supports high bandwidth digital content protection
(HDCP 1.1)
Digital audio interface
HDMI 1.1-compatible audio interface
S/PDIF (IEC90658-compatible) digital audio output
Multichannel I2S audio output (up to 8 channels)
APPLICATIONS
Figure 1.
Advanced TV
HDTV
Projectors
LCD monitor
CMOS outputs can be powered from 1.8 V to 3.3 V. The
AD9880’s on-chip PLL generates a pixel clock from Hsync. Pixel
clock output frequencies range from 12 MHz to 150 MHz. PLL
clock jitter is typically less than 700 ps p-p at 150 MHz. The
AD9880 also offers full sync processing for composite sync and
sync-on-green (SOG) applications.
Digital Interface
The AD9880 contains a HDMI 1.1-compatible receiver and supports all HDTV formats (up to 1080 p and 720 p) and display
resolutions up to SXGA (1280 × 1024 @75 Hz). The receiver
features an intrapair skew tolerance of up to one full clock cycle.
With the inclusion of HDCP, displays can now receive encrypted
video content. The AD9880 allows for authentication of a video
receiver, decryption of encoded data at the receiver, and renewability of the authentication during transmission, as specified by the
HDCP v 1.1 protocol.
GENERAL DESCRIPTION
The AD9880 offers designers the flexibility of an analog interface
and high definition multimedia interface (HDMI) receiver integrated on a single chip. Also included is support for high bandwidth digital content protection (HDCP).
Analog Interface
The AD9880 is a complete 8-bit 150 MSPS monolithic analog interface optimized for capturing component video (YPbPr) and RGB
graphics signals. Its 150 MSPS encode rate capability and full power
analog bandwidth of 330 MHz supports all HDTV formats (up to
1080 p) and FPD resolutions up to SXGA (1280 × 1024 @ 75 Hz).
The analog interface includes a 150 MHz triple ADC with internal
1.25 V reference, a phase-locked loop (PLL), and programmable
gain, offset, and clamp control. The user provides only 1.8 V and
3.3 V power supplies, analog input, and Hsync. Three-state
Fabricated in an advanced CMOS process, the AD9880 is provided
in a space-saving, 100-lead LQFP surface-mount Pb-free plastic
package and is specified over the 0°C to 70°C temperature range.
Rev. 0
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However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
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registered trademarks are the property of their respective owners.
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© 2005 Analog Devices, Inc. All rights reserved.
