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XC3S200-4TQG144C
1 Spartan-3 FPGA Family Data Sheet DS099 June 27, 2013 Module 1: Introduction and Ordering Information DS099 (v3.1) June 27, 2013 Product Specification Module 4: Pinout Descriptions DS099 (v3.1) June 27, 2013 • Pin Descriptions • Introduction • Features • Package Overview • Architectural Overview • Pinout Tables • Array Sizes and Resources • User I/O Chart • Ordering Information • • Pin Behavior During Configuration Footprints Module 2: Functional Description DS099 (v3.1) June 27, 2013 • Input/Output Blocks (IOBs) • IOB Overview • SelectIO™ Interface I/O Standards • Configurable Logic Blocks (CLBs) • Block RAM • Dedicated Multipliers • Digital Clock Manager (DCM) • Clock Network • Configuration Module 3: DC and Switching Characteristics DS099 (v3.1) June 27, 2013 • DC Electrical Characteristics • • Supply Voltage Specifications • Recommended Operating Conditions • • Absolute Maximum Ratings DC Characteristics Switching Characteristics • I/O Timing • Internal Logic Timing • DCM Timing • Configuration and JTAG Timing © Copyright 2003–2013 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, Artix, Kintex, Zynq, Vivado, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners. DS099 June 27, 2013 Product Specification www.xilinx.com 1
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