MC74HC04A
Hex Inverter
High−Performance Silicon−Gate CMOS
The MC74HC04A is identical in pinout to the LS04 and the
MC14069. The device inputs are compatible with Standard CMOS
outputs; with pullup resistors, they are compatible with LSTTL
outputs.
The device consists of six three−stage inverters.
http://onsemi.com
MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance With the JEDEC Standard No. 7A Requirements
Chip Complexity: 36 FETs or 9 Equivalent Gates
Pb−Free Packages are Available
14
PDIP−14
N SUFFIX
CASE 646
14
1
1
14
SOIC−14
D SUFFIX
CASE 751A
14
1
A2
A3
1
2
3
4
5
6
Y1
14
14
Y2
1
A4
A5
A6
8
11
10
13
12
TSSOP−14
DT SUFFIX
CASE 948G
1
Y3
Y=A
9
HC04AG
AWLYWW
1
LOGIC DIAGRAM
A1
MC74HC04AN
AWLYYWWG
HC
04
ALYWG
G
A
= Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
G or G
= Pb−Free Package
Y4
Y5
(Note: Microdot may be in either location)
Y6
FUNCTION TABLE
Pinout: 14−Lead Packages (Top View)
VCC
A6
Y6
A5
Y5
A4
Y4
Inputs
Outputs
14
13
12
11
10
9
8
A
Y
L
H
H
L
1
2
3
4
5
6
A1
Y1
A2
Y2
A3
Y3
ORDERING INFORMATION
7
GND
© Semiconductor Components Industries, LLC, 2006
October, 2006 − Rev. 11
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
1
Publication Order Number:
MC74HC04A/D
