Features
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Single Supply Voltage, Range 2.7V to 3.6V
Single Supply for Read and Write
Software Protected Programming
Fast Read Access Time – 120 ns
Low Power Dissipation
– 15 mA Active Current
– 40 µA CMOS Standby Current
Sector Program Operation
– Single Cycle Reprogram (Erase and Program)
– 1024 Sectors (256 Bytes/Sector)
– Internal Address and Data Latches for 256 Bytes
Two 8K Bytes Boot Blocks with Lockout
Fast Sector Program Cycle Time – 20 ms Max
Internal Program Control and Timer
DATA Polling for End of Program Detection
Typical Endurance > 10,000 Cycles
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option
2-megabit
(256K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT29BV020
1. Description
The AT29BV020 is a 2.7-volt-only in-system Flash Programmable and Erasable Read
Only Memory (PEROM). Its 2 megabits of memory is organized as 262,144 words by
8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS EEPROM technology,
the device offers access times to 120 ns, and a low 54 mW power dissipation. When
the device is deselected, the CMOS standby current is less than 40 µA. The device
endurance is such that any sector can typically be written to in excess of 10,000
times. The programming algorithm is compatible with other devices in Atmel’s Low
Voltage Flash family of products.
To allow for simple in-system reprogrammability, the AT29BV020 does not require
high input voltages for programming. The device can be operated with a single 2.7V to
3.6V supply. Reading data out of the device is similar to reading from an EPROM.
Reprogramming the AT29BV020 is performed on a sector basis; 256 bytes of data are
loaded into the device and then simultaneously programmed.
During a reprogram cycle, the address locations and 256 bytes of data are captured at
microprocessor speed and internally latched, freeing the address and data bus for
other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control
timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the
end of a program cycle has been detected, a new access for a read or program can
begin.
0402E–FLASH–2/05
