THC63LVD103D _Rev.1.0_E1
THC63LVD103D
135MHz 30Bits COLOR LVDS Transmitter
General Description
Features
The THC63LVD103D transmitter is designed to support pixel data transmission between Host and Flat
Panel Display from NTSC up to SXGA+ resolutions.
The THC63LVD103D converts 35bits of CMOS/TTL
data into LVDS(Low Voltage Differential Signaling)
data stream. The transmitter can be programmed for rising edge or falling edge clocks through a dedicated pin.
At a transmit clock frequency of 135MHz, 30bits of
RGB data and 5bits of timing and control data
(HSYNC, VSYNC, DE, CNTL1, CNTL2) are transmitted at an effective rate of 945Mbps per LVDS channel.
• Wide dot clock range: 8-135MHz suited for NTSC,
VGA, SVGA, XGA,SXGA and SXGA+
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PLL requires no external components
Supports spread spectrum clock generator
On chip jitter filtering
Clock edge selectable
Supports reduced swing LVDS for low EMI
Power down mode
Low power single 3.3V CMOS design
64pin TQFP
Pin compatible with THC63LVD103(30bits)
Block Diagram
CMOS/TTL INPUT
TC0-6
TD0-6
TE0-6
PARALLEL TO SERIAL
7
TA0-6
TB0-6
LVDS OUTPUT
7
7
7
7
CLK IN
(8 to135MHz)
TA +/-
TB +/-
TC +/-
TD +/-
TE +/-
PLL
TCLK +/(8 to 135MHz)
RS
R/F
/PDWN
Copyright 2007 THine Electronics, Inc. All rights reserved.
1
THine Electronics, Inc.
