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S29AL016D90TFI020

製品説明
仕様・特性

S29AL016D 16 Mbit (2 M x 8-Bit/1 M x 16-Bit), 3 V Boot Sector Flash da es ta e sh pa ee rts ti a s re av o ai bs la o bl le e te fo d r r an ef d er th en e ce . This product has been retired and is not recommended for designs. For new and current designs, S29AL016J supercedes S29AL016D. This is the factory-recommended migration path. Please refer to the S29AL016J data sheet for specifications and ordering information. Distinctive Characteristics Architectural Advantages – – – –  Single Power Supply Operation – Full voltage range: 2.7 to 3.6 volt read and write operations for battery-powered applications 200 nA Automatic Sleep mode current 200 nA standby mode current 9 mA read current 20 mA program/erase current  Manufactured on 200 nm Process Technology – Fully compatible with 200 nm Am29LV160D and MBM29LV160E devices  Cycling Endurance: 1,000,000 cycles per sector typical  Flexible Sector Architecture – One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and thirty-one 64 Kbyte sectors (byte mode) – One 8 Kword, two 4 Kword, one 16 Kword, and thirty-one 32 Kword sectors (word mode) Package Options  Sector Protection Features – A hardware method of locking a sector to prevent any program or erase operations within that sector – Sectors can be locked in-system or via programming equipment – Temporary Sector Unprotect feature allows code changes in previously locked sectors Software Features  Unlock Bypass Program Command – Reduces overall programming time when issuing multiple program command sequences  Top or Bottom Boot Block Configurations Available  Compatibility with JEDEC standards – Pinout and software compatible with single-power supply Flash – Superior inadvertent write protection  48-ball FBGA  48-pin TSOP  44-pin SOP  CFI (Common Flash Interface) Compliant – Provides device-specific information to the system, allowing host software to easily reconfigure for different Flash devices  Erase Suspend/Erase Resume – Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation  Data# Polling and Toggle Bits – Provides a software method of detecting program or erase operation completion Hardware Features  Ready/Busy# Pin (RY/BY#) – Provides a hardware method of detecting program or erase cycle completion Performance Characteristics  High Performance – Access times as fast as 70 ns – Extended temperature range (-40°C to +125°C) Th  Data Retention: 20 years typical  Hardware Reset Pin (RESET#) – Hardware method to reset the device to reading array data  Ultra Low Power Consumption (typical values at 5 MHz) Cypress Semiconductor Corporation Document Number: 002-01232 Rev. *A • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600 Revised December 08, 2015

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