Features
• Advanced, High-speed, Electrically-erasable Programmable Logic Device
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– Superset of 22V10
– Enhanced Logic Flexibility
– Backward Compatible with ATV750B/BL and ATV750/L
Low-power Edge-sensing “L” Option with 1 mA Standby Current
D- or T-type Flip-flop
Product Term or Direct Input Pin Clocking for Flip-flop
7.5 ns Maximum Pin-to-pin Delay with 5V Operation
Highest Density Programmable Logic Available in 24-pin and 28-pin Packages
– Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
Increased Logic Flexibility
– 42 Array Inputs, 20 Sum Terms and 20 Flip-flops
Enhanced Output Logic Flexibility
– All 20 Flip-flops Feed Back Internally
– 10 Flip-flops are also Available as Outputs
Programmable Pin-keeper Circuits
Dual-in-line and Surface Mount Package in Standard Pinouts
Full Military, Commercial and Industrial Temperature Ranges
20-year Data Retention
2000V ESD Protection
1000 Erase/Write Cycles
Green Package Options (Pb/Halide-free/RoHS Compliant) Available
High-speed
Complex
Programmable
Logic Device
ATF750C
ATF750CL
Block Diagram
(OE PRODUCT TERMS)
12
INPUT
PINS
PROGRAMMABLE
INTERCONNECT
AND
COMBINATORIAL
LOGIC ARRAY
LOGIC
OPTION
4 TO 8
PRODUCT
TERMS
10
I/O
PINS
OUTPUT
OPTION
(UP T0 20
FLIP-FLOPS)
(CLOCK PIN)
Pin Configurations
IN
Logic Inputs
I/O
Bi-directional Buffers
GND
Ground
VCC
+5V Supply
Note:
For PLCC, pins 1, 8, 15, and 22
can be left unconnected. For
superior performance, connect
VCC to pin 1 and GND to pins
8, 15, and 22.
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
IN
IN
CLK/IN
VCC *
VCC
I/O
I/O
Clock
PLCC/LCC
IN
IN
IN
GND *
IN
IN
IN
4
3
2
1
28
27
26
CLK
DIP/SOIC/TSSOP
5
6
7
8
9
10
11
25
24
23
22
21
20
19
12
13
14
15
16
17
18
Function
I/O
I/O
I/O
GND *
I/O
I/O
I/O
IN
IN
GND
GND *
IN
I/O
I/O
Pin
0776K–PLD–07/07
