CMOS 200 MHz
Quadrature Digital Upconverter
AD9856
FEATURES
APPLICATIONS
Universal low cost modulator solution for communications
applications
DC to 80 MHz output bandwidth
Integrated 12-bit D/A converter
Programmable sample rate interpolation filter
Programmable reference clock multiplier
Internal SIN(x)/x compensation filter
>52 dB SFDR @ 40 MHz AOUT
>48 dB SFDR @ 70 MHz AOUT
>80 dB narrow-band SFDR @ 70 MHz AOUT
+3 V single-supply operation
Space-saving surface-mount packaging
Bidirectional control bus interface
Supports burst and continuous Tx modes
Single-tone mode for frequency synthesis applications
Four programmable, pin-selectable, modulator profiles
Direct interface to AD8320/AD8321 PGA cable driver
HFC data, telephony, and video modems
Wireless and satellite communications
Cellular base stations
GENERAL DESCRIPTION
The AD9856 integrates a high speed, direct digital synthesizer
(DDS), a high performance, high speed, 12-bit digital-to-analog
converter (DAC), clock multiplier circuitry, digital filters, and
other DSP functions on a single chip to form a complete
quadrature digital upconverter device. The AD9856 is intended
to function as a universal I/Q modulator and agile upconverter
for communications applications where cost, size, power
dissipation, and dynamic performance are critical attributes.
The AD9856 is available in a space-saving surface-mount
package, and is specified to operate over the extended industrial
temperature range of −40°C to +85°C.
TxENABLE
(I /Q SYNC)
12
12
4 × TO 8 ×
SELECTABLE
INTERPOLATING
HALFBANDS
4 × TO 8 ×
SELECTABLE
INTERPOLATING
HALFBANDS
4 × TO 20 × PROG.
CLOCK
MULTIPLIER
REFERENCE
CLOCK IN
12
2 × TO 63 ×
SELECTABLE
INTERPOLATOR
AD9856
12
12
12
12
2 × TO 63 ×
SELECTABLE
INTERPOLATOR
12
12
SINE
INV 12
SINC
12
PROFILE
SELECT
3–4
DC-80 MHz
OUTPUT
DAC
RSET
12
COSINE
DDS AND CONTROL FUNCTIONS
PROFILE
SELECT
1–2
12-BIT
DAC
MASTER
RESET
SPI INTERFACE
TO AD8320/AD8321
PROGRAMMABLE
CABLE DRIVER
AMPLIFIER
BIDIRECTIONAL SPI CONTROL INTERFACE:
32-BIT FREQUENCY TUNING WORD
FREQUENCY UPDATE
INTERPOLATION FILTER RATE
REFERENCE CLOCK MULTIPLIER RATE
SPECTRAL PHASE INVERSION ENABLE
CABLE DRIVER AMPLIFIER CONTROL
00637-C-001
COMPLEX
DATA IN
DEMULTIPLEXER AND
SERIAL-TO-PARALLEL
CONVERTER
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
Rev. C
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