NCP302, NCP303
Voltage Detector Series
with Programmable Delay
The NCP302 and NCP303 series are second generation ultra−low
current voltage detectors that contain a programmable time delay
generator. These devices are specifically designed for use as reset
controllers in portable microprocessor based systems where extended
battery life is paramount.
Each series features a highly accurate undervoltage detector with
hysteresis and an externally programmable time delay generator. This
combination of features prevents erratic system reset operation.
The NCP302 series consists of complementary output devices that
are available with either an active high or active low reset. The
NCP303 series has an open drain N−Channel output with an active low
reset output.
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MARKING
DIAGRAM
5
1
xxx
A
Y
W
G
•
•
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
5
Features
•
•
•
•
•
•
•
TSOP−5/
SOT23−5
CASE 483
Quiescent Current of 0.5 mA Typical
High Accuracy Undervoltage Threshold of 2.0%
Externally Programmable Time Delay Generator
Wide Operating Voltage Range of 0.8 V to 10 V
Complementary or Open Drain Output
Active Low or Active High Reset
Specified Over the −40°C to +125°C Temperature Range
(Except for Voltage Options from 0.9 to 1.1 V)
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
PIN CONNECTIONS
Reset
Output
1
Input
2
Ground
3
ORDERING INFORMATION
NCP303LSNxxT1
Open Drain Output Configuration
Input
2
RD
GND 5
Input
1
Reset Output
RD
1
*
3
4 N.C.
See detailed ordering and shipping information in the ordering
information section on page 22 of this data sheet.
NCP302xSNxxT1
Complementary Output Configuration
Vref
5 CD
(Top View)
Microprocessor Reset Controller
Low Battery Detection
Power Fail Indicator
Battery Backup Detection
2
1
(Note: Microdot may be in either location)
Typical Applications
•
•
•
•
xxx AYWG
G
Reset
Output
Vref
CD
3
GND 5
CD
* Inverter for active low devices.
* Buffer for active high devices.
This device contains 28 active transistors.
Figure 1. Representative Block Diagrams
© Semiconductor Components Industries, LLC, 2014
May, 2014 − Rev. 26
1
Publication Order Number:
NCP302/D