CY8C24094, CY8C24794
CY8C24894, CY8C24994
PSoC® Programmable System-on-Chip
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XRES pin to support In-System Serial Programming (ISSP) and
external reset control in CY8C24894
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Powerful Harvard-architecture processor
❐ M8C processor speeds to 24 MHz
❐ Two 8 × 8 multiply, 32-bit accumulate
❐ Low power at high speed
❐ 3 V to 5.25 V operating voltage
❐ Industrial temperature range: –40 °C to +85 °C
❐ USB temperature range: –10 °C to +85 °C
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Advanced peripherals (PSoC® Blocks)
❐ Six rail-to-rail analog PSoC blocks provide:
• Up to 14-bit analog-to-digital converters (ADCs)
• Up to 9-bit digital-to-analog converters (DACs)
• Programmable gain amplifiers (PGAs)
• Programmable filters and comparators
❐ Four digital PSoC blocks provide:
• 8 to 32-bit timers, counters, and pulse width modulators
(PWMs)
• Cyclical redundancy check (CRC) and pseudo random
sequence (PRS) modules
• Full-duplex universal asynchronous receiver transmitter
(UART)
• Multiple serial peripheral interface (SPI) masters or slaves
• Connectable to all general purpose I/O (GPIO) pins
❐ Complex peripherals by combining blocks
❐ Capacitive sensing application (CSA) capability
Precision, programmable clocking
❐ Internal ±4% 24- and 48- MHz oscillator
❐ Internal oscillator for watchdog and sleep
❐ 0.25% accuracy for USB with no external components
Additional system resources
2
❐ I C slave, master, and multi-master to 400 kHz
❐ Watchdog and sleep timers
❐ User-configurable low-voltage detection (LVD)
2. Logic Block Diagram
Port 5 Port 4 Port 3
Port 7
System Bus
1. Features
Global Digital Interconnect
Port 2 Port 1 Port 0 Analog
Drivers
Global Analog Interconnect
PSoC CORE
SRAM
1K
SROM
Flash16 KB
Sleep and
Watchdog
CPU Core (M8C)
Interrupt
Controller
Clock Sources
(Includes IMO and ILO)
DIGITAL SYSTEM
ANALOG SYSTEM
Analog
Ref.
Full-Speed USB (12 Mbps)
❐ Four unidirectional endpoints
❐ One bidirectional control endpoint
❐ USB 2.0 compliant
❐ Dedicated 256 byte buffer
❐ No external crystal required
Digital
Block
Array
Flexible on-chip memory
❐ 16 KB flash program storage 50,000 erase and write cycles
❐ 1 KB static random access memory (SRAM) data storage
❐ ISSP
❐ Partial flash updates
❐ Flexible protection modes
❐ Electrically erasable programmable read-only memory
(EEPROM) emulation in flash
Analog
Block
Array
Digital
2
Decimator
Clocks MACs Type 2
I2C
POR and LVD Internal
Voltage
System Resets
Ref.
USB
Analog
Input
Muxing
SYSTEM RESOURCES
Programmable pin configurations
❐ 25 mA sink, 10 mA source on all GPIOs
❐ Pull-up, pull-down, high Z, strong, or open drain drive modes
on all GPIOs
❐ Up to 48 analog inputs on GPIO
❐ Two 33 mA analog outputs on GPIO
❐ Configurable interrupt on all GPIOs
Cypress Semiconductor Corporation
Document Number: 38-12018 Rev. *V
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198 Champion Court
•
San Jose, CA 95134-1709
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408-943-2600
Revised May 27, 2010
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