HOME在庫検索>在庫情報

部品型式

MDS108AL

製品説明
仕様・特性

MDS108 Unmanaged 9-Port 10/100 Mbps Ethernet Switch Data Sheet Features November 2003 • 8 10/100 Mbps auto-negotiating RMII ports • 1 10/100 Mbps auto-negotiating MII/serial port (port 8) that can be used as a WAN uplink or as a 9th port • Ordering Information MDS108AL Operates stand-alone or can be cascaded with a second MDS108 to reach 16 ports 208 Pin PQFP -40°C to +85°C - XLink expansion MII port (port 8) - Input ports are defined to be high or low priority - Operates at 100/200/300/400 Mbps - Allows explicit identification of IP phone ports External I2C EEPROM for power-up configuration • Supports both full and half duplex ports - • • Ports 0 & 1 can be trunked to provide a 200 Mbps link to another switch or server Default mode allows operation without external EEPROM • Up to 8 port-based VLANs • • Full wirespeed layer 2 switching on all ports (up to 2.679 M packets per second) Port 7 can be used to mirror traffic from the other 7 ports (0-6) • • Internal 1 K MAC address table Utilizes a single low-cost external pipelined, SyncBurst SRAM (SBRAM) for buffer memory • Flow control capabilities • - Auto address learning Auto address aging 256 KB or 512 KB (1 chip) - Provides back-pressure for half duplex - Leading-edge Quality of Service (QoS) capabilities provided based on 802.1 p and IP TOS/DS field 802.3x flow control for full duplex • Supports external parallel port for configuration updates - Packet scheduling based on Weighted Round Robin (WRR) and Weighted Random Early Detection/Drop (WRED) • Special power-saving mode for inactive ports • Ability to support WinSock 2.0 and Windows2000 smart applications - With flow control disabled, can drop packets during congestion using WRED • Transmit delay control capabilities • 2 queues per output port - 2 levels of packet drop provided - Provides port-based prioritization of packets on up to 4 ports • Assures maximum delay (< 1 ms) Supports mixed voice/data networks Optimized pin-out for easy board layout Figure 1 - System Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.

ブランド

供給状況

 
Not pic File
お探し製品MDS108ALは、クレバーテックのSTAFFが市場確認を行いemailにて御回答致します。

「見積依頼」をクリックして どうぞお問合せください。

お支払方法

宅配業者の代金引換又は商品到着後一週間以内の銀行振込となります。


お取引内容はこちら

0.0605731010