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部品型式

AD7392AR

製品説明
仕様・特性

3 V, Parallel Input Micropower 10-/12-Bit DACs AD7392/AD7393 Micropower: 100 μA 0.1 μA typical power shutdown Single-supply 2.7 V to 5.5 V operation AD7392: 12-bit resolution AD7393: 10-bit resolution 0.9 LSB differential nonlinearity error APPLICATIONS Automotive 0.5 V to 4.5 V output span voltage Portable communications Digitally controlled calibration PC peripherals FUNCTIONAL BLOCK DIAGRAM AD7392 VDD 12-BIT DAC VREF VOUT SHDN 12 DAC REGISTER AGND 12 DGND CS D0 TO D11 RS 01121-001 FEATURES Figure 1. GENERAL DESCRIPTION The AD7392/AD7393 comprise a set of pin-compatible 10-/12-bit voltage output, digital-to-analog converters. The parts are designed to operate from a single 3 V supply. Built using a CBCMOS process, these monolithic DACs offer low cost and ease of use in single-supply 3 V systems. Operation is guaranteed over the supply voltage range of 2.7 V to 5.5 V, making this device ideal for battery-operated applications. The full-scale voltage output is determined by the external reference input voltage applied. The rail-to-rail REFIN to DACOUT allows a full-scale voltage equal to the positive supply VDD or any value in between. The voltage outputs are capable of sourcing 5 mA. Both parts are offered with similar pinouts, which allows users to select the amount of resolution appropriate for their applications without changing the circuit card. The AD7392/AD7393 are specified for operation over the extended industrial temperature range of −40°C to +85°C. The AD7393AR is specified for the automotive temperature range of −40°C to +125°C. The AD7392/AD7393 are available in 20-lead PDIP and 20-lead SOIC packages. For serial data input, 8-lead packaged versions, see the AD7390 and AD7391. A data latch load of 12 bits with a 45 ns write time eliminates wait states when interfacing to the fastest processors. Additionally, an asynchronous RS input sets the output to a zero scale at power-on or upon user demand. Rev. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©1996–2007 Analog Devices, Inc. All rights reserved. AD7392/AD7393 SPECIFICATIONS ELECTRICAL CHARACTERISTICS At VREF = 2.5 V, −40°C < TA < +85°C, unless otherwise noted. Table 1. AD7392 Parameter STATIC PERFORMANCE Resolution1 Relative Accuracy2 Symbol Conditions 3 V ± 10% 5 V ± 10% Unit TA = +25°C TA = −40°C, +85°C TA = +25°C, monotonic Monotonic Data = 0x000, TA = +25°C, +85°C Data = 0x000, TA = −40°C TA = +25°C, +85°C, data = 0xFFF TA = −40°C, data = 0xFFF TCVFS 12 ±1.8 ±3 ±0.9 ±1 4.0 8.0 ±8 ±20 28 12 ±1.8 ±3 ±0.9 ±1 4.0 8.0 ±8 ±20 28 Bits LSB max LSB max LSB max LSB max mV max mV max mV max mV max ppm/°C typ VREF RREF CREF 0/VDD 2.5 5 0/VDD 2.5 5 V min/max MΩ typ4 pF typ 1 3 100 1 3 100 mA typ mA typ pF typ VIL VIH IIL CIL 0.5 VDD − 0.6 10 10 0.8 VDD − 0.6 10 10 V max V min μA max pF max tCS tDS tDH tRS 45 30 20 40 45 15 5 30 ns min ns min ns min ns min Data = 0x000 to 0xFFF to 0x000 To ±0.1% of full scale 0.05 70 Code 0x7FF to Code 0x800 to Code 0x7FF 65 15 −63 0.05 60 80 65 15 −63 V/μs typ μs typ μs typ nV/s typ nV/s typ dB typ 2.7/5.5 55/100 0.1/1.5 300 0.006 2.7/5.5 55/100 0.1/1.5 500 0.006 V min/max μA typ/max μA typ/max μW max %/% max N INL Differential Nonlinearity2 DNL Zero-Scale Error VZSE Full-Scale Voltage Error VFSE Full-Scale Temperature Coefficient3 REFERENCE INPUT VREF Range Input Resistance Input Capacitance3 ANALOG OUTPUT Current (Source) Output Current (Sink) Capacitive Load3 LOGIC INPUTS Logic Input Low Voltage Logic Input High Voltage Input Leakage Current Input Capacitance3 INTERFACE TIMING3, 5 Chip Select Write Width Data Setup Data Hold Reset Pulse Width AC CHARACTERISTICS Output Slew Rate Settling Time6 Shutdown Recovery Time DAC Glitch Digital Feedthrough Feedthrough SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current Shutdown Supply Current Power Dissipation Power Supply Sensitivity IOUT IOUT CL SR tS tSDR Data = 0x800, ∆ VOUT = 5 LSB Data = 0x800, ∆ VOUT = 5 LSB No oscillation VOUT/VREF VREF = 1.5 V dc + 1 V p-p, data = 0x000, f = 100 kHz VDD RANGE IDD IDD-SD PDISS PSS DNL < ±1 LSB VIL = 0 V, no load SHDN = 0, VIL = 0 V, no load VIL = 0 V, no load Δ VDD = ±5% 1 One LSB = VREF/4096 V for the 12-bit AD7392. The first two codes (0x000, 0x001) are excluded from the linearity error measurement. 3 These parameters are guaranteed by design and not subject to production testing. 4 Typicals represent average readings measured at +25°C. 5 All input control signals are specified with tR = tF = 2 ns (10% to 90% of 13 V) and timed from a voltage level of 1.6 V. 6 The settling time specification does not apply for negative going transitions within the last 3 LSBs of ground. 2 Rev. C | Page 3 of 20

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