SN54LV540A, SN74LV540A
OCTAL BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCLS409C – APRIL 1998 – REVISED MAY 2000
D
D
D
D
D
D
SN54LV540A . . . J OR W PACKAGE
SN74LV540A . . . DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
OE1
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE2
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
SN54LV540A . . . FK PACKAGE
(TOP VIEW)
A3
A4
A5
A6
A7
description
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
Y1
Y2
Y3
Y4
Y5
A8
GND
Y8
Y7
Y6
The ’LV540A devices are octal buffers/drivers
designed for 2-V to 5.5-V VCC operation.
OE2
D
EPIC ™ (Enhanced-Performance Implanted
CMOS) Process
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
2-V to 5.5-V VCC Operation
Support Mixed-Mode Voltage Operation on
All Ports
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic
Small-Outline (DW, NS), Shrink
Small-Outline (DB), Thin Very Small-Outline
(DGV), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Flat (W) Packages, Chip
Carriers (FK), and DIPs (J)
A2
A1
OE1
VCC
D
These devices are ideal for driving bus lines or
buffer memory address registers. They feature
inputs and outputs on opposite sides of the
package to facilitate printed circuit board layout.
The 3-state control gate is a two-input AND gate with active-low inputs so that if either output-enable (OE1 or
OE2) input is high, all corresponding outputs are in the high-impedance state. The outputs provide inverted data
when they are not in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54LV540A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74LV540A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each buffer/driver)
INPUTS
A
OUTPUT
Y
L
L
H
L
H
L
H
X
X
Z
X
H
X
Z
OE1
OE2
L
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments.
Copyright © 2000, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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