A1210, A1211, A1212, A1213, and A1214
Continuous-Time Latch Family
Features and Benefits
Description
▪ Continuous-time operation
▫ Fast power-on time
▫ Low noise
▪ Stable operation over full operating temperature range
▪ Reverse battery protection
▪ Solid-state reliability
▪ Factory-programmed at end-of-line for optimum
performance
▪ Robust EMC performance
▪ High ESD rating
▪ Regulator stability without a bypass capacitor
The Allegro® A1210-A1214 Hall-effect latches are next
generation replacements for the popular Allegro 317x and
318x lines of latching switches. The A121x family, produced with BiCMOS technology, consists of devices that
feature fast power-on time and low-noise operation. Device
programming is performed after packaging, to ensure
increased switchpoint accuracy by eliminating offsets that
can be induced by package stress. Unique Hall element
geometries and low-offset amplifiers help to minimize noise
and to reduce the residual offset voltage normally caused by
device overmolding, temperature excursions, and thermal
stress.
The A1210-A1214 Hall-effect latches include the following
on a single silicon chip: voltage regulator, Hall-voltage generator, small-signal amplifier, Schmitt trigger, and NMOS
output transistor. The integrated voltage regulator permits
operation from 3.8 to 24 V. The extensive on-board protection circuitry makes possible a ±30 V absolute maximum
voltage rating for superior protection in automotive and
industrial motor commutation applications, without adding
external components. All devices in the family are identical
except for magnetic switchpoint levels.
Packages: 3 pin SOT23W (suffix LH), and
3 pin SIP (suffix UA)
1
3
2
1
2
The small geometries of the BiCMOS process allow these
devices to be provided in ultrasmall packages. The package
styles available provide magnetically optimized solutions
for most applications. Package LH is an SOT23W, a miniature low-profile surface-mount package, while package
UA is a three-lead ultramini SIP for through-hole mounting.
Each package is lead (Pb) free, with 100% matte tin plated
leadframes.
3
Not to scale
Functional Block Diagram
VCC
To all subcircuits
Regulator
VOUT
Amp
Gain
Offset
Trim
Control
GND
A1210-DS, Rev. 6
