TS5A3160
1-Ω SPDT ANALOG SWITCH
5-V/3.3-V SINGLE-CHANNEL 2:1 MULTIPLEXER/DEMULTIPLEXER
www.ti.com
SCDS216 – OCTOBER 2005
FEATURES
APPLICATIONS
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Isolation in the Powered-Off Mode, V+ = 0
Specified Make-Before-Break Switching
Low ON-State Resistance (1 Ω)
Control Inputs Are 5.5-V Tolerant
Low Charge Injection
Excellent ON-State Resistance Matching
Low Total Harmonic Distortion (THD)
1.65-V to 5.5-V Single-Supply Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 1000-V Charged-Device Model (C101)
DBV OR DCK PACKAGE
(TOP VIEW)
Cell Phones
PDAs
Portable Instrumentation
Audio and Video Signal Routing
Low-Voltage Data Acquisition Systems
Communication Circuits
Modems
Hard Drives
Computer Peripherals
Wireless Terminals and Peripherals
YEP OR YZP PACKAGE
(BOTTOM VIEW)
NO 1
6
IN
NC
3
4
COM
GND 2
5
V+
GND
2
5
V+
NO
1
6
IN
NC 3
4 COM
DESCRIPTION/ORDERING INFORMATION
The TS5A3160 is a single-pole double-throw (SPDT) analog switch that is designed to operate from 1.65 V to
5.5 V. The device offers a low ON-state resistance and an excellent channel-to-channel ON-state resistance
matching. The device has excellent total harmonic distortion (THD) performance and consumes very low power.
These features make this device suitable for portable audio applications.
ORDERING INFORMATION
TA
PACKAGE (1)
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
–40°C to 85°C 0.23-mm Large Bump – YZP
(Pb-free)
TOP-SIDE MARKING (2)
TS5A3160YEPR
Tape and reel
PREVIEW
TS5A3160YZPR
SOT (SOT-23) – DBV
(1)
(2)
Tape and reel
TS5A3160DBVR
JA8_
SOT (SC-70) – DCK (2)
Tape and reel
TS5A3160DCKR
JA_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated