SN74AUC1G02
SINGLE 2ĆINPUT POSITIVEĆNOR GATE
SCES369M − SEPTEMBER 2001 − REVISED MAY 2005
D Available in the Texas Instruments
D
D
D
D
D Low Power Consumption, 10-µA Max ICC
D ±8-mA Output Drive at 1.8 V
D Latch-Up Performance Exceeds 100 mA Per
NanoStar and NanoFree Packages
Optimized for 1.8-V Operation and Is 3.6-V
I/O Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub 1-V Operable
Max tpd of 2.4 ns at 1.8 V
1
A
VCC
2
GND
3
VCC
2
GND
4
5
3
4
A
1
B
1
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DRL PACKAGE
(TOP VIEW)
2
GND
5
B
B
D
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
A
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
3
5
VCC
GND
3 4
B
4
A
Y
Y
1 5
Y
2
VCC
Y
See mechanical drawings for dimensions.
description /ordering information
This single 2-input positive-NOR gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V
to 1.95-V VCC operation.
The SN74AUC1G02 performs the Boolean function Y = A + B or Y = A • B in positive logic.
ORDERING INFORMATION
PACKAGE†
TA
ORDERABLE PART NUMBER
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74AUC1G02YEAR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
−40°C to 85°C
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
TOP-SIDE MARKING‡
SN74AUC1G02YZAR
Tape and reel
_ _ _UB_
SN74AUC1G02YEPR
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SN74AUC1G02YZPR
SOT (SOT-23) − DBV
Tape and reel
SN74AUC1G02DBVR
U02_
SOT (SC-70) − DCK
Tape and reel
SN74AUC1G02DCKR
UB_
SOT (SOT-553) − DRL
Reel of 4000
SN74AUC1G02DRLR
UB_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
Copyright 2005, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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