CY6264
8K x 8 Static RAM
Features
power-down feature (CE1), reducing the power consumption
by over 70% when deselected. The CY6264 is packaged in a
450-mil (300-mil body) SOIC.
• 55, 70 ns access times
• CMOS for optimum speed/power
• Easy memory expansion with CE1, CE2, and OE
features
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The CY6264 is a high-performance CMOS static RAM
organized as 8192 words by 8 bits. Easy memory expansion
is provided by an active LOW chip enable (CE1), an active
HIGH chip enable (CE2), and active LOW output enable (OE)
and three-state drivers. Both devices have an automatic
An active LOW write enable signal (WE) controls the
writing/reading operation of the memory. When CE1 and WE
inputs are both LOW and CE2 is HIGH, data on the eight data
input/output pins (I/O0 through I/O7) is written into the memory
location addressed by the address present on the address
pins (A0 through A12). Reading the device is accomplished by
selecting the device and enabling the outputs, CE1 and OE
active LOW, CE2 active HIGH, while WE remains inactive or
HIGH. Under these conditions, the contents of the location
addressed by the information on address pins is present on
the eight data input/output pins.
The input/output pins remain in a high-impedance state unless
the chip is selected, outputs are enabled, and write enable
(WE) is HIGH. A die coat is used to insure alpha immunity.
Logic Block Diagram
Pin Configuration
SOIC
Top View
I/O0
INPUT BUFFER
SENSE AMPS
A1
A2
A3
A4
A5
A6
A7
A8
ROW DECODER
I/O1
256 x 32 x 8
ARRA
Y
I/O2
I/O3
I/O4
NC
A4
A5
A6
A7
A8
A9
A10
A11
A12
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
CE2
A3
A2
A1
OE
A0
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
I/O5
I/O6
CE1
CE2
WE
COLUMN DECODER
POWER
DOWN
I/O7
3901 North First Street
•
Cypress Semiconductor Corporation
Document #: 001-02367 Rev. **
A12
A11
A9
A10
A0
OE
•
San Jose, CA 95134
•
408-943-2600
Revised June 27, 2005
CY6264
Switching Characteristics Over the Operating Range[3]
6264-55
Parameter
Description
Min.
6264-70
Max.
Min.
Max.
Unit
READ CYCLE
tRC
Read Cycle Time
55
tAA
Address to Data Valid
tOHA
Data Hold from Address Change
tACE1
CE1 LOW to Data Valid
55
70
ns
tACE2
CE2 HIGH to Data Valid
40
70
ns
tDOE
OE LOW to Data Valid
35
ns
tLZOE
OE LOW to Low Z
55
5
OE HIGH to High
tLZCE1
CE1 LOW to Low
Z[5]
tLZCE2
CE2 HIGH to Low Z
tHZCE
tPU
CE1 LOW to Power-Up
tPD
CE1 HIGH to Power-Down
WRITE
70
25
CE1 HIGH to High Z[4, 5]
CE2 LOW to High Z
ns
ns
5
3
Z[4]
tHZOE
70
ns
5
20
5
ns
30
ns
5
3
ns
5
20
0
ns
30
ns
0
25
ns
30
ns
CYCLE[6]
tWC
Write Cycle Time
50
70
ns
tSCE1
CE1 LOW to Write End
40
60
ns
tSCE2
CE2 HIGH to Write End
30
50
ns
tAW
Address Set-Up to Write End
40
55
ns
tHA
Address Hold from Write End
0
0
ns
tSA
Address Set-Up to Write Start
0
0
ns
tPWE
WE Pulse Width
25
40
ns
tSD
Data Set-Up to Write End
25
35
ns
tHD
Data Hold from Write End
0
0
ns
[4]
tHZWE
WE LOW to High Z
tLZWE
WE HIGH to Low Z
20
30
ns
5
5
ns
Test Conditions
Max.
Unit
7
pF
7
pF
Shaded areas contain advance information.
Capacitance[7]
Parameter
Description
CIN
Input Capacitance
COUT
Output Capacitance
TA = 25°C, f = 1 MHz,
VCC = 5.0V
Notes:
3. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
IOL/IOH and 30-pF load capacitance.
4. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
5. At any given temperature and voltage condition, tHZCE is less than tLZCE for any given device.
6. The internal write time of the memory is defined by the overlap of CE1 LOW, CE2 HIGH, and WE LOW. Both signals must be LOW to initiate a write and either
signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write.
7. Tested initially and after any design or process changes that may affect these parameters.
Document #: 001-02367 Rev. **
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