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TC4015BP
TC4015BP/BF/BFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC4015BP,TC4015BF,TC4015BFN TC4015B Dual 4-Stage Static Shift Register (with serial input/parallel output) Note: xxxFN (JEDEC SOP) is not available in Japan. TC4015B contains two circuits of 4 stage shift registers and the independent output is drived from each stage. As all the D type flip-flops of every stage have common RESET input, asynchronous clear operation can be achieved by an external signal at arbitrary timing. The flip-flop of each stage is triggered by rising edge of CLOCK input. RESET input of “H” level resets the contents of all the stages to “L” regardless of CLOCK and DATA inputs and all of data outputs Q1 through Q4 become “L”. This can be used for converting serial data to palallel one and for ring counters of any numbering systems. TC4015BP TC4015BF Pin Assignment TC4015BFN Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 Truth Table Inputs CLOCKΔ Outputs DATA RESET Q1 Q2 Q3 Q4 L L L Q1 Q2 Q3 H L H Q1 Q2 Q3 * L * H : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) * No Change L L L L Δ: Level change *: Don’t care 1 2007-10-01
TOSHIBA
株式会社 東芝セミコンダクター&ストレージ社
日本
半導体部門、DRAM、フラッシュメモリ、プロセッサ、汎用LSI
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