MM74HC32
Quad 2-Input OR Gate
Features
General Description
■ Typical propagation delay: 10ns
The MM74HC32 OR gates utilize advanced silicon-gate
CMOS technology to achieve operating speeds similar to
LS-TTL gates with the low power consumption of standard CMOS integrated circuits. All gates have buffered
outputs providing high noise immunity and the ability to
drive 10 LS-TTL loads. The 74HC logic family is functionally as well as pin-out compatible with the standard
74LS logic family. All inputs are protected from damage
due to static discharge by internal diode clamps to VCC
and ground.
■ Wide power supply range: 2V–6V
■ Low quiescent current: 20µA maximum (74HC Series)
■ Low input current: 1µA maximum
■ Fanout of 10 LS-TTL loads
Ordering Information
Order Number
Package
Number
Package Description
MM74HC32M
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
MM74HC32SJ
M14D
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MM74HC32MTC
MM74HC32N
MTC14
N14A
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Connection Diagram
Logic Diagram
Pin Assignments for DIP, SOIC, SOP and TSSOP
Y=A+B
(1 of 4)
Top View
©1983 Fairchild Semiconductor Corporation
MM74HC32 Rev. 1.3.0
www.fairchildsemi.com
MM74HC32 — Quad 2-Input OR Gate
February 2008