MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Octal 3-State Noninverting
Buffer/Line Driver/
Line Receiver with
LSTTL-Compatible Inputs
MC54/74HCT244A
J SUFFIX
CERAMIC PACKAGE
CASE 732–03
20
1
High–Performance Silicon–Gate CMOS
The MC54/74HCT244A is identical in pinout to the LS244. This device
may be used as a level converter for interfacing TTL or NMOS outputs to
High–Speed CMOS inputs. The HCT244A is an octal noninverting buffer
line driver line receiver designed to be used with 3–state memory address
drivers, clock drivers, and other bus–oriented systems. The device has
non–inverted outputs and two active–low output enables.
The HCT244A is the noninverting version of the HCT240. See also
HCT241.
•
•
•
•
•
•
Output Drive Capability: 15 LSTTL Loads
TTL NMOS–Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1 µA
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 112 FETs or 28 Equivalent Gates
N SUFFIX
PLASTIC PACKAGE
CASE 738–03
20
1
DW SUFFIX
SOIC PACKAGE
CASE 751D–04
20
1
1
SD SUFFIX
SSOP PACKAGE
CASE 940C–03
1
DT SUFFIX
TSSOP PACKAGE
CASE 948E–02
20
20
ORDERING INFORMATION
Ceramic
MC54HCTXXXAJ
Plastic
MC74HCTXXXAN
SOIC
MC74HCTXXXADW
SSOP
MC74HCTXXXASD
TSSOP
MC74HCTXXXADT
LOGIC DIAGRAM
PIN ASSIGNMENT
A1
A2
A3
A4
2
18
4
16
6
14
8
12
YA1
B2
B3
B4
11
9
13
7
15
5
17
3
1
20
VCC
A1
ENABLE B
18
YA1
4
17
B4
YB3
YA4
19
3
A2
YA3
2
YB4
YA2
5
16
YA2
YB1
A3
B3
14
YA3
8
13
B2
YB1
YB2
15
7
A4
NONINVERTING
OUTPUTS
6
YB2
9
12
YA4
GND
DATA INPUTS
B1
ENABLE A
10
11
B1
YB3
YB4
FUNCTION TABLE
Inputs
Outputs
Enable A,
Enable B
A, B
YA, YB
L
L
H
PIN 20 = VCC
PIN 10 = GND
1
OUTPUT ENABLE A
ENABLES ENABLE B 19
L
H
X
L
H
Z
Z = high impedance
X = don’t care
2/97
© Motorola, Inc. 1997
1
REV 7
