a
FEATURES
22-Bit Sigma-Delta ADC
Dynamic Range of 105 dB (146 Hz Input)
؎0.003% Integral Nonlinearity
On-Chip Low-Pass Digital Filter
Cutoff Programmable from 584 Hz to 36.5 Hz
Linear Phase Response
Five Line Serial I/O
Twos Complement Coding
Easy Interface to DSPs and Microcomputers
Software Control of Filter Cutoff
؎5 V Supply
Low Power Operation: 50 mW
APPLICATIONS
Biomedical Data Acquisition
ECG Machines
EEG Machines
Process Control
High Accuracy Instrumentation
Seismic Systems
GENERAL DESCRIPTION
The AD7716 is a signal processing block for data acquisition
systems. It is capable of processing four channels with bandwidths of up to 584 Hz. Resolution is 22 bits and the usable
dynamic range varies from 111 dB with an input bandwidth of
36.5 Hz to 99 dB with an input bandwidth of 584 Hz.
The device consists of four separate A/D converter channels that
are implemented using sigma-delta technology. Sigma-delta
ADCs include on-chip digital filtering and, thus, the system
filtering requirements are eased.
Three address pins program the device address. This allows a
data acquisition system with up to 32 channels to be set up in a
simple fashion. The output word from the device contains 32
bits of data. One bit is determined by the state of the DIN1 input and may be used, for example, in an ECG system with an
external pacemaker detect circuit to indicate that the output
word is invalid because of the presence of a pacemaker pulse.
LC2MOS
22-Bit Data Acquisition System
AD7716
FUNCTIONAL BLOCK DIAGRAM
AVDD DVDD AVSS
RESET
A0 A1
AD7716
AIN 1
AIN 2
AIN 3
ANALOG
MODULATOR
ANALOG
MODULATOR
ANALOG
MODULATOR
A2
CLKIN
CLKOUT
CLOCK
GENERATION
LOW PASS
DIGITAL
FILTER
MODE
CONTROL
LOGIC
OUTPUT
SHIFT
REGISTER
LOW PASS
DIGITAL
FILTER
LOW PASS
DIGITAL
FILTER
CASCIN
SDATA
CASCOUT
RFS
SCLK
DRDY
AIN 4
ANALOG
MODULATOR
VREF
AGND
LOW PASS
DIGITAL
FILTER
DGND
CONTROL
REGISTER
TFS
DIN 1
DOUT 1
DOUT 2
There are 22 bits of data corresponding to the analog input.
Two bits contain the channel address and 3 bits are the device
address. Thus, each channel in a 32-channel system would have
a discrete 5-bit address. The device also has a CASCOUT pin
and a CASCIN pin that allow simple networking of multiple
devices.
The on-chip control register is programmed using the SCLK,
SDATA and TFS pins. Three bits of the Control Register set
the digital filter cutoff frequency for the device. Selectable frequencies are 584 Hz, 292 Hz, 146 Hz, 73 Hz and 36.5 Hz. A
further 2 bits appear as outputs DOUT1 and DOUT2 and can be
used for controlling calibration at the front end. The device is
available in a 44-pin PQFP (Plastic Quad Flatpack) and 44-pin
PLCC.
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
