Dual 10-Bit TxDAC+
with 2 Interpolation Filters
AD9761
®
FEATURES
Complete 10-Bit, 40 MSPS Dual Transmit DAC
Excellent Gain and Offset Matching
Differential Nonlinearity Error: 0.5 LSB
Effective Number of Bits: 9.5
Signal-to-Noise and Distortion Ratio: 59 dB
Spurious-Free Dynamic Range: 71 dB
2 Interpolation Filters
20 MSPS/Channel Data Rate
Single Supply: 3 V to 5.5 V
Low Power Dissipation: 93 mW (3 V Supply @
40 MSPS)
On-Chip Reference
28-Lead SSOP
FUNCTIONAL BLOCK DIAGRAM
DCOM
SLEEP
DVDD
LATCH
I
CLOCK
2
ACOM
AVDD
I
DAC
IOUTA
IOUTB
REFERENCE
LATCH
Q
WRITE INPUT
SELECT INPUT
MUX
CONTROL
REFLO
FSADJ
REFIO
BIAS
GENERATOR
DAC DATA
INPUTS
(10 BITS)
COMP1
COMP2
COMP3
2
Q
DAC
QOUTA
QOUTB
AD9761
PRODUCT DESCRIPTION
The AD9761 is a complete dual-channel, high speed, 10-bit
CMOS DAC. The AD9761 has been developed specifically for
use in wide bandwidth communication applications (e.g., spread
spectrum) where digital I and Q information is being processed
during transmit operations. It integrates two 10-bit, 40 MSPS
DACs, dual 2 interpolation filters, a voltage reference, and digital input interface circuitry. The AD9761 supports a 20 MSPS
per channel input data rate that is then interpolated by 2 up to
40 MSPS before simultaneously updating each DAC.
The interleaved I and Q input data stream is presented to the
digital interface circuitry, which consists of I and Q latches as
well as some additional control logic. The data is de-interleaved
back into its original I and Q data. An on-chip state machine
ensures the proper pairing of I and Q data. The data output from
each latch is then processed by a 2 digital interpolation filter
that eases the reconstruction filter requirements. The interpolated output of each filter serves as the input of their respective
10-bit DAC.
The DACs utilize a segmented current source architecture combined with a proprietary switching technique to reduce glitch
energy and to maximize dynamic accuracy. Each DAC provides
differential current output, thus supporting single-ended or differential applications. Both DACs are simultaneously updated
and provide a nominal full-scale current of 10 mA. Also, the
full-scale currents between each DAC are matched to within
0.07 dB (i.e., 0.75%), thus eliminating the need for additional
gain calibration circuitry.
The AD9761 is manufactured on an advanced low cost CMOS
process. It operates from a single supply of 3 V to 5.5 V and
consumes 200 mW of power. To make the AD9761 complete, it
also offers an internal 1.20 V temperature-compensated band gap
reference.
PRODUCT HIGHLIGHTS
1. Dual 10-Bit, 40 MSPS DACs
A pair of high performance 40 MSPS DACs optimized for low
distortion performance provide for flexible transmission of I
and Q information.
2. 2 Digital Interpolation Filters
Dual matching FIR interpolation filters with 62.5 dB stopband rejection precede each DAC input, thus reducing the
DACs’ reconstruction filter requirements.
3. Low Power
Complete CMOS dual DAC function operates on a low
200 mW on a single supply from 3 V to 5.5 V. The DAC
full-scale current can be reduced for lower power operation, and a sleep mode is provided for power reduction
during idle periods.
4. On-Chip Voltage Reference
The AD9761 includes a 1.20 V temperature-compensated
band gap voltage reference.
5. Single 10-Bit Digital Input Bus
The AD9761 features a flexible digital interface that allows
each DAC to be addressed in a variety of ways including different update rates.
6. Small Package
The AD9761 offers the complete integrated function in a
compact 28-lead SSOP package.
7. Product Family
The AD9761 Dual Transmit DAC has a pair of Dual Receive
ADC companion products, the AD9281 (8 bits) and AD9201
(10 bits).
REV. C
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use, nor for any infringements of patents or other rights of third parties
that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks
and registered trademarks are the property of their respective companies.
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