a
14-Bit, 150 MSPS TxDAC+™
with 2؋ Interpolation Filter
AD9772
FEATURES
Single 2.7 V to 3.6 V Supply
14-Bit DAC Resolution and Input Data Width
150 MSPS Input Data Rate
63.3 MHz Reconstruction Passband @ 150 MSPS
75 dBc SFDR @ 25 MHz
2؋ Interpolation Filter with High or Low Pass Response
73 dB Image Rejection with 0.005 dB Passband Ripple
“Zero-Stuffing” Option for Enhanced Direct IF
Performance
Internal 2؋/4؋ Clock Multiplier
205 mW Power Dissipation; 13 mW with Power-Down
Mode
48-Lead LQFP Package
OBS
CLKCOM CLKVDD
MOD0 MOD1
The AD9772 is a single supply, oversampling, 14-bit digital-toanalog converter (DAC) optimized for baseband or IF waveform
reconstruction applications requiring exceptional dynamic range.
Manufactured on an advanced CMOS process, it integrates a
complete, low distortion 14-bit DAC with a 2× digital interpolation filter and clock multiplier. The on-chip PLL clock multiplier provides all the necessary clocks for the digital filter and the
14-bit DAC. A flexible differential clock input allows for a singleended or differential clock driver for optimum jitter performance.
For baseband applications, the 2× digital interpolation filter
provides a low pass response, hence providing up to a three-fold
reduction in the complexity of the analog reconstruction filter. It
does so by multiplying the input data rate by a factor of two
while simultaneously suppressing the original upper inband
image by more than 73 dB. For direct IF applications, the 2×
digital interpolation filter response can be reconfigured to select
the upper inband image (i.e., high pass response) while suppressing the original baseband image. To increase the signal
level of the higher IF images and their passband flatness in direct IF applications, the AD9772 also features a “zero stuffing”
option in which the data following the 2× interpolation filter is
upsampled by a factor of two by inserting midscale data samples.
The AD9772 can reconstruct full-scale waveforms with bandwidths as high as 63.3 MHz while operating at an input data rate of
150 MSPS. The 14-bit DAC provides differential current outputs to support differential or single-ended applications. A
TxDAC+ is a trademark of Analog Devices, Inc.
RESET
PLLLOCK
DIV0 DIV1
AD9772
PLLCOM
CLK+
CLOCK DISTRIBUTION
AND MODE SELECT
CLK–
1؋
DATA
INPUTS
(DB13...DB0)
1؋/2؋
EDGETRIGGERED
LATCHES
FILTER
CONTROL
MUX
CONTROL
2؋ FIR
INTERPOLATION
FILTER
PLL CLOCK
MULTIPLIER
2؋/4؋
ZERO
STUFF
MUX
DCOM
DVDD
ACOM
AVDD
LPF
PLLVDD
IOUTA
14-BIT DAC
IOUTB
+1.2V REFERENCE
AND CONTROL AMP
SLEEP
OLE
APPLICATIONS
Communication Transmit Channel
WCDMA Base Stations, Multicarrier Base Stations,
Direct IF Synthesis
Instrumentation
PRODUCT DESCRIPTION
FUNCTIONAL BLOCK DIAGRAM
REFIO
FSADJ
REFLO
segmented current source architecture is combined with a proprietary switching technique to reduce spurious components and
enhance dynamic performance. Matching between the two
current outputs ensures enhanced dynamic performance in a
differential output configuration. The differential current outputs may be fed into a transformer or a differential op amp
topology to obtain a single-ended output voltage using an appropriate resistive load.
TE
The on-chip bandgap reference and control amplifier are configured for maximum accuracy and flexibility. The AD9772 can be
driven by the on-chip reference or by a variety of external reference voltages. The full-scale current of the AD9772 can be
adjusted over a 2 mA to 20 mA range, thus providing additional
gain ranging capabilities.
The AD9772 is available in a 48-lead LQFP package and specified for operation over the industrial temperature range of –40°C
to +85°C.
PRODUCT HIGHLIGHTS
1. A flexible, low power 2× interpolation filter supporting reconstruction bandwidths of up to 63.3 MHz can be configured for a low or high pass response with 73 dB of image
rejection for traditional baseband or direct IF applications.
2. A “zero-stuffing” option enhances direct IF applications.
3. A low glitch, fast settling 14-bit DAC provides exceptional
dynamic range for both baseband and direct IF waveform
reconstruction applications.
4. The AD9772 digital interface, consisting of edge-triggered
latches and a flexible differential or single-ended clock input,
can support input data rates up to 150 MSPS.
5. On-chip PLL clock multiplier generates all of the internal high
speed clocks required by the interpolation filter and DAC.
REV. 0
6. The current output(s) of the AD9772 can easily be configured
for various single-ended or differential circuit topologies.
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1999
