PRELIMINARY
Am29200 ™ and Am29205 ™
Advanced
Micro
Devices
RISC Microcontrollers
DISTINCTIVE CHARACTERISTICS
Am29200 Microcontroller
Glueless system interfaces with on-chip wait
state control
Completely integrated system for embedded
applications
Four banks of ROM, each separately
programmable for 8-, 16-, or 32-bit interface
Full 32-bit architecture
Four banks of DRAM, each separately
programmable for 16- or 32-bit interface
CMOS technology/TTL-compatible
16- and 20-MHz operating frequencies
Burst-mode and page-mode access support
8 million instructions per second (MIPS)
sustained at 16 MHz
On-chip DRAM mapping
Two-channel DMA controller with
queuing on one channel
304-Mbyte address space
192 general-purpose registers
6-port peripheral interface adapter
Three-address instruction architecture
16-line programmable I/O port
Fully pipelined
Am29200 MICROCONTROLLER BLOCK DIAGRAM
Parallel Port
Control/Status
Lines
4
4
Clock/
6
STAT
MEMCLK
5 Control
4
JTAG
Lines
5
7
2 DREQ
2 DACK
GREQ/GACK/TDMA
Parallel Port
Controller
2-Channel DMA
Controller
Serial Port
Programmable
I/O Port
Serial
Data
Printer/Scanner
Video
ROM
Chip Selects
4
ROM
Space
Memory
Serializer/
Deserializer
Am29000® CPU
Interrupt
Controller
ROM
Controller
DRAM Controller
PIA
Controller
Timer/Counter
6
PIA
Chip Selects
24
Address
Bus
32
Instruction/Data
Bus
16
6
I/O
Interrupts, Traps
RAS/CAS
4/4
DRAM
Peripherals
This document contains information on a product under development at Advanced Micro Devices, Inc. The information is intended
to help you evaluate this product. AMD® reserves the right to change or discontinue work on this proposed product without notice.
Publication# 16361 Rev. C Amendment /0
Issue Date: January 1994. WWW: 5/4/95.
