FINAL
Am79C30A/32A
Digital Subscriber Controller™ (DSC™) Circuit
DISTINCTIVE CHARACTERISTICS
s Combines CCITT I.430 S/T-Interface
Transceiver, D-Channel LAPD Processor, Audio
s Certified protocol software support available
s Processor (DSC device only), and IOM-2
Interface in a single chip
s D-channel processing capability
s CMOS technology, TTL compatible
— Flag generation/detection
s Special operating modes allow realization of
CCITT I.430 power-compliant terminal
equipment
— CRC generation/checking
— Zero insertion/deletion
— Four 2-byte address detectors
s S- or T-Interface Transceiver
— Level 1 Physical Layer Controller
— 32-byte receive and 16-byte transmit FIFOs
— Supports point-to-point, short and extended
passive bus configurations
— Provides multiframe support
BLOCK DIAGRAM
SBP/IOM-2 Interface
AINA
AREF
AINB
EAR1
EAR2
LS1
LS2
CAP2
Main Audio
Processor (MAP)
(Am79C30A
Only)
SBIN
SCLK BCL/CH2STRB*
SBIOUT
SFS
HSW
S/T Line
Interface Unit
(LIU)
Peripheral Port
(PP)
Bd Be Bf
LOUT1
LOUT2
LIN1
LIN2
S/T Interface
Audio Interface
CAP1
D
Channel
B1
Ba
XTAL1
XTAL2
B-channel Multiplexer
(MUX)
B2
D-Channel Data
Link Controller
(DLC)
Oscillator
(OSC)
Bb
Bc
MCLK
CS
WR
RD
D
Channel
Microprocessor Interface
(MUX)
D7 D6 D5 D4 D3 D2 D1 D0 INT A2
Microprocessor Interface
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
RESET
A1 A0
09893H-1
Publication# 09893 Rev: H Amendment/0
Issue Date: November 1997
