PRELIMINARY
Am79C970
PCnetTM-PCI Single-Chip Ethernet Controller for PCI Local Bus
Advanced
Micro
Devices
DISTINCTIVE CHARACTERISTICS
s Single-chip Ethernet controller for the Peripheral Component Interconnect (PCI) local bus
s Supports ISO 8802-3 (IEEE/ANSI 802.3) and
Ethernet Standards
s Direct interface to the PCI local bus
s Compliant to PCI local bus specification
(Revision 2.0)
s Software compatible with AMD’s Am7990
LANCE, Am79C90 C-LANCE, Am79C960
PCnet-ISA, Am79C961 PCnet-ISA+, Am79C965
PCnet-32, and Am79C900 ILACCTM register and
descriptor architecture
s Compatible with Am2100/Am1500T and Novell®
NE2100/NE1500
driver
software
s High-performance Bus Master architecture with
integrated DMA Buffer Management Unit for
low CPU and bus utilization
s Big endian byte alignment supported
s Single +5 V power supply operation
s Low-power, CMOS design with sleep modes
allows reduced power consumption for critical
battery powered applications and Green PCs
s MicrowireTM EEPROM interface supports
jumperless design
s Individual 136-byte transmit and 128-byte
receive FIFOs provide frame buffering for
increased system latency, and support the
following features:
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s
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s
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s
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s
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— Automatic retransmission with no FIFO
reload
— Automatic receive stripping and transmit
padding (individually programmable)
— Automatic runt packet rejection
— Automatic deletion of received collision frames
Look-Ahead Packet Processing (LAPP)
concept allows protocol analysis to begin
before end of receive frame
Integrated Manchester Encoder/Decoder
Provides integrated Attachment Unit Interface
(AUI) and 10BASE-T transceiver with automatic
port selection
Automatic Twisted-Pair receive polarity detection and automatic correction of the receive
polarity
Optional byte padding to long-word boundary
on receive
Dynamic transmit FCS generation programmable on a frame-by-frame basis
Internal/external loopback capabilities
Supports the following types of network
interfaces:
— AUI to external 10BASE2, 10BASE5,10BASE-T
or 10BASE-F MAU
— Internal 10BASE-T transceiver with Smart
Squelch to Twisted-Pair medium
NAND Tree test mode for connectivity testing
on printed circuit boards
132-pin PQFP package
GENERAL DESCRIPTION
The PCnet-PCI single-chip 32-bit Ethernet controller is
a highly integrated Ethernet system solution designed to
address high-performance system application requirements. It is a flexible bus-mastering device that can be
used in any application, including network-ready PCs,
printers, fax modems, and bridge/router designs. The
bus-master architecture provides high data throughput
in the system and low CPU and system bus utilization.
The PCnet-PCI controller is fabricated with AMD’s advanced low-power CMOS process to provide low operating and standby current for power sensitive
applications.
1-868
The PCnet-PCI controller is a complete Ethernet node
integrated into a single VLSI device. It contains a bus interface unit, a DMA buffer management unit, an IEEE
802.3-defined Media Access Control (MAC) function, individual 136-byte transmit and 128-byte receive FIFOs,
an IEEE 802.3-defined Attachment Unit Interface (AUI)
and Twisted-Pair Transceiver Media Attachment Unit
(10BASE-T MAU), and a Microwire EEPROM interface.
The PCnet-PCI controller is also register compatible
with the LANCE (Am7990) Ethernet controller, the
C-LANCE (Am79C90) Ethernet controller, the ILACC
(Am79C900) Ethernet controller, and all Ethernet
This document contains information on a product under development at Advanced Micro Devices, Inc.
The information is intended to help you to evaluate this product. AMD reserves the right to change or
discontinue work on this proposed product without notice.
Publication# 18220 Rev. C
Issue Date: June 1994
Amendment /0
