IDT49FCT3805/A
3.3V CMOS BUFFER/CLOCK DRIVER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS
BUFFER/CLOCK DRIVER
IDT49FCT3805/A
FEATURES:
DESCRIPTION:
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
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The FCT3805 is a 3.3 volt, non-inverting clock driver built using
advanced dual metal CMOS technology. The device consists of two banks
of drivers, each with a 1:5 fanout and its own output enable control. The
device has a "heartbeat" monitor for diagnostics and PLL driving. The
MON output is identical to all other outputs and complies with the output
specifications in this document. The FCT3805 offers low capacitance inputs
with hysteresis.
The FCT3805 is designed for high speed clock distribution where signal
quality and skew are critical. The FCT3805 also allows single point-topoint transmission line driving in applications such as address distribution,
where one signal must be distributed to multiple recievers with low skew
and high signal quality.
For more information on using the FCT3805 with two different input
frequencies on bank A and B, please see AN-236.
0.5 MICRON CMOS Technology
Guaranteed low skew < 500ps (max.)
Very low duty cycle distortion < 1.0ns (max.)
Very low CMOS power levels
TTL compatible inputs and outputs
Inputs can be driven from 3.3V or 5V components
Two independent output banks with 3-state control
1:5 fanout per bank
"Heartbeat" monitor output
VCC = 3.3V ± 0.3V
Available in SSOP, SOIC, and QSOP packages
VCCA
VCCB
2
19
OB1
3
18
OB2
OA3
4
17
OB3
GNDA
5
16
GNDB
OA4
6
15
OB4
OA5
7
14
OB5
GNDQ
8
13
MON
OEA
9
12
OEB
INA
10
11
INB
OA1 - OA5
5
IN B
20
OA2
5
IN A
1
OA1
OE A
OB1 - OB5
OE B
M ON
SOIC/ SSOP/ QSOP
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COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGE
c
2005
Integrated Device Technology, Inc.
1
APRIL 2005
DSC-3102/6