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TC74HC139AP
TC74HC139AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC139AP,TC74HC139AF,TC74HC139AFN Dual 2-to-4 Line Decoder The TC74HC139A is a high speed CMOS 2-to-4 LINE DECODER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications. When the enable input is held “H”, all four outputs are fixed at a high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Note: xxxFN (JEDEC SOP) is not available in Japan. TC74HC139AP TC74HC139AF Features • High speed: tpd = 16 ns (typ.) at VCC = 5 V • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28% VCC (min) • Output drive capability: 10 LSTTL loads • • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) ∼ Balanced propagation delays: tpLH − tpHL • Wide operating voltage range: VCC (opr) = 2~6 V • Pin and function compatible with 74LS139 TC74HC139AFN Pin Assignment Weight DIP16-P-300-2.54A SOP16-P-300-1.27A SOL16-P-150-1.27 1 : 1.00 g (typ.) : 0.18 g (typ.) : 0.13 g (typ.) 2007-10-01
TOSHIBA
株式会社 東芝セミコンダクター＆ストレージ社
日本
半導体部門、DRAM、フラッシュメモリ、プロセッサ、汎用LSI
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