GS74108ATP/J/X
SOJ, TSOP, FP-BGA
Commercial Temp
Industrial Temp
512K x 8
4Mb Asynchronous SRAM
Features
6, 7, 8, 10, 12 ns
3.3 V VDD
Center VDD and VSS
SOJ 512K x 8-Pin Configuration
• Fast access time: 6, 7, 8, 10, 12 ns
• CMOS low power operation: 155/135/120/95/85 mA at
minimum cycle time
• Single 3.3 V power supply
• All inputs and outputs are TTL-compatible
• Fully static operation
• Industrial Temperature Option: –40° to 85°C
• Package line up
J: 400 mil, 36-pin SOJ package
TP: 400 mil, 44-pin TSOP Type II package
X: 6 mm x 10 mm Fine Pitch Ball Grid Array
package
A4
1
36
NC
A3
2
35
A5
A2
3
34
A6
A1
4
33
A7
A0
5
32
A8
CE
6
31
OE
DQ1
7
30
DQ8
DQ2
8
29
DQ7
VDD
9
28
VSS
27
VDD
36-pin
400 mil SOJ
VSS
10
DQ3
11
26
DQ6
Description
DQ4
12
25
DQ5
WE
13
24
A9
The GS74108A is a high speed CMOS Static RAM organized
as 524,288 words by 8 bits. Static design eliminates the need
for external clocks or timing strobes. The GS74108A operates
on a single 3.3 V power supply and all inputs and outputs are
TTL-compatible. The GS74108A is available in 400 mil SOJ,
400 mil TSOP Type-II, and 6 mm x 10 mm FP-BGA packages.
A17
14
23
A10
A16
15
22
A11
A15
16
21
A12
A14
17
20
A18
A13
18
19
NC
FP-BGA 256K x 16 Bump Configuration (Package X)
Pin Descriptions
Symbol
1
Description
2
3
4
5
6
A0–A18
Address input
DQ1–DQ8
Data input/output
A
LB
OE
A0
A1
A2
NC
CE
Chip enable input
B
DQ16
UB
A3
A4
CE
DQ1
WE
Write enable input
C
DQ14 DQ15
A5
A6
DQ2
DQ3
OE
Output enable input
VDD
+3.3 V power supply
D
VSS
DQ13
A17
A7
DQ4
VDD
VSS
Ground
E
VDD
DQ12
NC
A16
DQ5
VSS
NC
No connect
F
DQ11 DQ10
A8
A9
DQ7
DQ6
G
DQ9
NC
A10
A11
WE
DQ8
H
NC
A12
A13
A14
A15
NC
6 x 10 mm Bump Pitch
Rev: 1.02 3/2002
1/14
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2001, Giga Semiconductor, Inc.
