HD74HC374, HD74HC534
Octal D-type Flip-Flops (with 3-state outputs)
Octal D-type Flip-Flops (with inverted 3-state outputs)
REJ03D0620-0200
(Previous ADE-205-499)
Rev.2.00
Mar 30, 2006
Description
These devices are positive edge triggered flip-flops. The difference between HD74HC374 and HD74HC534 is only
that the former is a true outputs and the latter is a false outputs. Data at the D inputs, meeting the setup and hold time
requirements, are transferred to the Q outputs on positive going transitions of the clock (CK) input. When a high logic
level is applied to the output control (OC) input, all outputs go to a high impedance state, regardless of what signals are
present at the other inputs and the state of the storage elements.
Features
• High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
HD74HC374P
HD74HC534P
HD74HC374FPEL
HD74HC534FPEL
Package Type
DILP-20 pin
SOP-20 pin (JEITA)
Package Code
(Previous Code)
PRDP0020AC-B
(DP-20NEV)
PRSP0020DD-B
(FP-20DAV)
Package
Abbreviation
P
—
FP
EL (2,000 pcs/reel)
PRSP0020DC-A
RP
(FP-20DBV)
PTSP0020JB-A
HD74HC374TELL
TSSOP-20 pin
T
(TTP-20DAV)
Note: Please consult the sales office for the above package availability.
HD74HC534RPEL
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
SOP-20 pin (JEDEC)
ELL (2,000 pcs/reel)
Function Table
Output Control
L
L
L
Note:
Clock
L
D
H
HD74HC374
Q
H
HD74HC534
Q
L
L
X
L
No change
H
No change
Z
Z
H
X
X
1. H; High level, L; Low level, X; Irrelevant, Z; High impedance
Rev.2.00 Mar 30, 2006 page 1 of 8
