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ADP5052ACPZ-R7

製品説明
仕様・特性

5-Channel Integrated Power Solution with Quad Buck Regulators and 200 mA LDO Regulator ADP5052 Data Sheet FEATURES TYPICAL APPLICATION CIRCUIT ADP5052 SYNC/MODE VREG INT VREG OSCILLATOR 100mA VDD C1 RT C0 FB1 PVIN1 4.5V TO 15V BST1 C2 COMP1 CHANNEL 1 BUCK REGULATOR (1.2A/2.5A/4A) SW1 VOUT1 C4 Q1 DL1 SS12 PGND DL2 RILIM1 RILIM2 Q2 PVIN2 COMP2 L1 VREG EN1 C5 C3 CHANNEL 2 BUCK REGULATOR (1.2A/2.5A/4A) VREG BST2 EN2 VOUT2 SW2 C6 L2 C7 FB2 PWRGD PVIN3 C8 COMP3 EN3 BST3 CHANNEL 3 BUCK REGULATOR (1.2A) SW3 C9 L3 VOUT3 C10 FB3 PGND3 SS34 BST4 PVIN4 C11 COMP4 CHANNEL 4 BUCK REGULATOR (1.2A) EN4 1.7V TO 5.5V C14 APPLICATIONS Small cell base stations FPGA and processor applications Security and surveillance Medical applications PVIN5 EN5 SW4 C12 FB4 L4 VOUT4 C13 PGND4 CHANNEL 5 200mA LDO REGULATOR VOUT5 FB5 VOUT5 C15 10900-001 Wide input voltage range: 4.5 V to 15 V ±1.5% output accuracy over full temperature range 250 kHz to 1.4 MHz adjustable switching frequency Adjustable/fixed output options via factory fuse Power regulation Channel 1 and Channel 2: programmable 1.2 A/2.5 A/4 A sync buck regulators with low-side FET driver Channel 3 and Channel 4: 1.2 A sync buck regulators Channel 5: 200 mA low dropout (LDO) regulator Always alive 5.1 V LDO supply for tiny load demand Single 8 A output (Channel 1 and Channel 2 operated in parallel) Precision enable with 0.8 V accurate threshold Active output discharge switch FPWM or automatic PWM/PSM mode selection Frequency synchronization input or output Optional latch-off protection on OVP/OCP failure Power-good flag on selected channels UVLO, OCP, and TSD protection 48-lead, 7 mm × 7 mm LFCSP package −40°C to +125°C junction temperature EXPOSED PAD Figure 1. GENERAL DESCRIPTION The ADP5052 combines four high performance buck regulators and one 200 mA low dropout (LDO) regulator in a 48-lead LFCSP package that meets demanding performance and board space requirements. The device enables direct connection to high input voltages up to 15 V with no preregulators. Channel 1 and Channel 2 integrate high-side power MOSFETs and low-side MOSFET drivers. External NFETs can be used in low-side power devices to achieve an efficiency optimized solution and deliver a programmable output current of 1.2 A, 2.5 A, or 4 A. Combining Channel 1 and Channel 2 in a parallel configuration can provide a single output with up to 8 A of current. Channel 3 and Channel 4 integrate both high-side and low-side MOSFETs to deliver output current of 1.2 A. precision enable pin on each channel for easy power-up sequencing or adjustable UVLO threshold. The ADP5052 integrates a general-purpose LDO regulator with low quiescent current and low dropout voltage that provides up to 200 mA of output current. Table 1. Family Models Model ADP5050 ADP5051 ADP5052 ADP5053 ADP5054 Channels Four bucks, one LDO Four bucks, supervisory Four bucks, one LDO Four bucks, supervisory Four high current bucks I2C Yes Yes No No No Package 48-Lead LFCSP 48-Lead LFCSP 48-Lead LFCSP 48-Lead LFCSP 48-Lead LFCSP The switching frequency of the ADP5052 can be programmed or synchronized to an external clock. The ADP5052 contains a Rev. B Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013–2015 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com

ブランド

AD

会社名

Analog Devices

本社国名

U.S.A

事業概要

半導体デバイスを製造するアメリカの多国籍企業。特にADC、DAC、MEMS、DSPなどに強い。現在は 65nm から 3μm のプロセスルールの回路を設計している。

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