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E2G1049-18-33
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2-Bank ¥ 524,288-Word ¥ 16-Bit SYNCHRONOUS DYNAMIC RAM
DESCRIPTION
The MSM56V16160D/DH is a 2-bank ¥ 524,288-word ¥ 16-bit synchronous dynamic RAM,
fabricated in Oki's CMOS silicon-gate process technology. The device operates at 3.3 V. The
inputs and outputs are LVTTL compatible.
FEATURES
•
•
•
•
•
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Silicon gate, quadruple polysilicon CMOS, 1-transistor memory cell
2-bank ¥ 524,288-word ¥ 16-bit configuration
3.3 V power supply, ±0.3 V tolerance
Input
: LVTTL compatible
Output : LVTTL compatible
Refresh : 4096 cycles/64 ms
Programmable data transfer mode
– CAS latency (1, 2, 3)
– CAS latency (2, 3)*1
– Burst length (1, 2, 4, 8, full page)
– Burst length (1, 2, 4, 8)*1
– Data scramble (sequential, interleave)
*1 : H version only.
• CBR auto-refresh, Self-refresh capability
• Package:
50-pin 400 mil plastic TSOP (Type II) (TSOPII50-P-400-0.80-K)
(Product : MSM56V16160D/DH-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Family
Max.
Frequency
Access Time (Max.)
tAC2
tAC3
MSM56V16160D-10
100 MHz
9 ns
9 ns
MSM56V16160D-12
83 MHz
14 ns
10 ns
MSM56V16160DH-15
66 MHz
9 ns
ar
ThisMSM56V16160D/DH
version: Mar. 1998
in
¡ Semiconductor
MSM56V16160D/DH
¡ Semiconductor
9 ns
1/30
