March 1, 2005
SX20AC/SX28AC
Configurable Communications Controllers with EE/Flash Program
Memory, In-System Programming Capability and On-Chip Debug
1.0
1.1
PRODUCT OVERVIEW
Introduction
enables the device to implement hard real-time functions
as software modules (Virtual Peripheral™) to replace traditional hardware functions.
The Ubicom SX family of configurable communications
controllers are fabricated in an advanced CMOS process
technology. The advanced process, combined with a
RISC-based architecture, allows high-speed computation, flexible I/O control, and efficient data manipulation.
Throughput is enhanced by operating the device at frequencies up to 75 MHz and by optimizing the instruction
set to include mostly single-cycle instructions. In addition,
the SX architecture is deterministic and totally reprogramable. The unique combination of these characteristics
On-chip functions include a general-purpose 8-bit timer
with prescaler, an analog comparator, a brown-out detector, a watchdog timer, a power-save mode with multisource wakeup capability, an internal R/C oscillator, userselectable clock modes, and high-current outputs.
RTCC
OSC1 OSC2
OSC
8-bit Watchdog
8-bit Timer
Driver
Clock
RTCC
Timer (WDT)
Select
4MHz
Internal
÷ 4 or ÷ 1
RC OSC
Interrupt Stack
System Clock
8
MCLR
Prescaler for RTCC
Power-On
Analog
3
or
Reset
Interrupt
RESET
MIWU
Port B
Comp
Prescaler for WDT
Brown-Out
8
8
8
MIWU System
Clock
Internal Data Bus
8
8
8
8
8 8
8
8
In-System
W
PC
Debugging
Port A Port C
3 Level
8
ALU
FSR
Address
Stack
Fetch
In-System
4
8
Instruction
PC
Programming
Decode
Pipeline
136 Bytes
STATUS
SRAM
Executive
2k Words
Address 12
EEPROM
OPTION
Write Back
MODE
8 Write Data
Read Data
8
Instruction
12
IREAD
Figure 1-1. Block Diagram
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Ubicom™ and the Ubicom logo are trademarks of Ubicom, Inc.
I2C™ is a trademark of Philips Corporation
© 2005 Ubicom, Inc. All rights reserved.
-1-
www.ubicom.com
