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EN25Q80B-104HIP

製品説明
仕様・特性

EN25Q80B EN25Q80B 8 Megabit Serial Flash Memory with 4Kbyte Uniform Sector FEATURES • Single power supply operation - Full voltage range: 2.7-3.6 volt • Serial Interface Architecture - SPI Compatible: Mode 0 and Mode 3 • 8 M-bit Serial Flash - 8 M-bit/1024 K-byte/4096 pages - 256 bytes per programmable page • - Standard, Dual or Quad SPI Standard SPI: CLK, CS#, DI, DO, WP# Dual SPI: CLK, CS#, DQ0, DQ1, WP# Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3 • - High performance 104MHz clock rate for one data bit 104MHz clock rate for two data bits 104MHz clock rate for four data bits • Low power consumption - 10 mA typical active current - 1 μA typical power down current • - Uniform Sector Architecture: 256 sectors of 4-Kbyte 32 blocks of 32-Kbyte 16 blocks of 64-Kbyte Any sector or block can be erased individually • Software and Hardware Write Protection: - Write Protect all or portion of memory via software - Enable/Disable protection with WP# pin • - High performance program/erase speed Page program time: 0.6ms typical Sector erase time: 30ms typical 32KB Block erase time 100ms typical 64KB Block erase time 200ms typical Chip erase time: 3 seconds typical • Lockable 512 byte OTP security sector • Support Serial Flash Discoverable Parameters (SFDP) signature • Read Unique ID Number • Minimum 100K endurance cycle • - Package Options 8 pins SOP 150mil body width 8 pins VSOP 150mil body width 8 pins SOP 200mil body width - 8 contact USON 2x3 mm 8 contact VDFN (5x6mm) - 8 pins PDIP 24 balls TFBGA (6x8mm) All Pb-free packages are compliant RoHS, Halogen-Free and REACH. • Industrial temperature Range GENERAL DESCRIPTION The EN25Q80B is an 8 Megabit (1024K-byte) Serial Flash memory, with advanced write protection mechanisms. The EN25Q80B supports the standard Serial Peripheral Interface (SPI), and a high performance Dual output as well as Quad I/O using SPI pins: Serial Clock, Chip Select, Serial DQ0(DI), DQ1(DO), DQ2(WP#) and DQ3(NC). SPI clock frequencies of up to 104MHz are supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual Output and 416MHz (104MHz x 4) for Quad Output when using the Dual/Quad Output Fast Read instructions. The memory can be programmed 1 to 256 bytes at a time, using the Page Program instruction. The EN25Q80B is designed to allow either single Sector/Block at a time or full chip erase operation. The EN25Q80B can be configured to protect part of the memory as the software protected mode. The device can sustain a minimum of 100K program/erase cycles on each sector or block. This Data Sheet may be revised by subsequent versions ©2013 Eon Silicon Solution, Inc., 1 or modifications due to changes in technical specifications. Rev. B, Issue Date: 2013/10/16 www.eonssi.com

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